Patents by Inventor Kazuhiro Matsunami

Kazuhiro Matsunami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9733142
    Abstract: When a main body of a sensor chip (1) is in a grounded state, a shield layer (71) constituting a shield electrode formed on a circuit layer (72) is grounded through a resistor (46).
    Type: Grant
    Filed: October 15, 2013
    Date of Patent: August 15, 2017
    Assignees: KABUSHIKI KAISHA SAGINOMIYA SEISAKUSHO, FUJI ELECTRIC CO., LTD.
    Inventors: Takuro Ishikawa, Yuji Kanai, Kazuhiro Matsunami
  • Patent number: 9666288
    Abstract: On an IC chip, a first ground wiring line and a second ground wiring line that extends from a connection site with the first ground wiring line are disposed in a doubled manner. Among EPROMs storing identical data, the source of a first EPROM is connected to the second ground wiring line and the source of a second EPROM is connected to the first ground wiring line. The drains of the EPROMs are electrically connected to a write voltage line. An OR circuit outputs as 1-bit data of the memory circuit, the logical sum of the data stored by at least two of the EPROMs storing identical data. The EPROMs and the OR circuit are disposed near each other on the IC chip.
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: May 30, 2017
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Kazuhiro Matsunami, Mutsuo Nishikawa
  • Publication number: 20170045407
    Abstract: A semiconductor physical quantity sensor device having a power source terminal for receiving a power source potential, a ground terminal for receiving a ground potential, and an output terminal. The semiconductor physical quantity sensor includes a sensor configured to generate a signal, an amplifier configured to amplify the signal, and to output the amplified signal through the output terminal, a first resistor electrically connected between the power source terminal and the amplifier, a second resistor electrically connected between the output terminal and the ground terminal, and a filter electrically connected between the power source terminal and the sensor, and including a third resistor and a capacitor.
    Type: Application
    Filed: June 30, 2016
    Publication date: February 16, 2017
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Mutsuo NISHIKAWA, Katsuya KARASAWA, Kazuhiro MATSUNAMI
  • Publication number: 20170018310
    Abstract: On an IC chip, a first ground wiring line and a second ground wiring line that extends from a connection site with the first ground wiring line are disposed in a doubled manner. Among EPROMs storing identical data, the source of a first EPROM is connected to the second ground wiring line and the source of a second EPROM is connected to the first ground wiring line. The drains of the EPROMs are electrically connected to a write voltage line. An OR circuit outputs as 1-bit data of the memory circuit, the logical sum of the data stored by at least two of the EPROMs storing identical data. The EPROMs and the OR circuit are disposed near each other on the IC chip.
    Type: Application
    Filed: June 6, 2016
    Publication date: January 19, 2017
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Kazuhiro MATSUNAMI, Mutsuo NISHIKAWA
  • Patent number: 9431065
    Abstract: A semiconductor integrated circuit that exhibits an enhanced surge withstand voltage of a nonvolatile memory and has a reduced chip area, having a nonvolatile memory and a Zener diode connected in parallel between a write terminal and a ground terminal. The nonvolatile memory is connected to the write terminal by a write terminal line and to a common connection point by a first ground line. The cathode of the Zener diode is connected to the write terminal line. The anode of the Zener diode is connected to the specified connection point by a second ground line. The first ground line and the second ground line are connected to the specified connection point.
    Type: Grant
    Filed: March 12, 2015
    Date of Patent: August 30, 2016
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Mutsuo Nishikawa, Kazuhiro Matsunami, Yuko Fujimoto
  • Patent number: 9331684
    Abstract: A semiconductor device 3 for sensing a physical quantity adjusts the output characteristic of a pressure sensor, for example, based on trimming data stored in an EPROM 34. A comparator 311 compares an input voltage given to a terminal 43 and a predetermined reference voltage, and delivers a write control signal for EPROM 34. When the comparator 311 delivers a Low signal for the EPROM 34, a first gate circuit 312 provided between the terminal 43 and a temperature sensor 32 connects the terminal 43 and the temperature sensor 32. A second gate circuit 313 provided between the terminal 43 and a pull-down resistor 314 disconnects the terminal 43 and the pull-down resistor 314. The operational voltage of the temperature sensor 32 is lower than the reference voltage, and the terminal 43 is used as an output terminal for the temperature sensor 32.
    Type: Grant
    Filed: March 9, 2015
    Date of Patent: May 3, 2016
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Katsuya Karasawa, Mutsuo Nishikawa, Kazuhiro Matsunami
  • Patent number: 9245851
    Abstract: A semiconductor device has a plurality of first opening portions formed in an interlayer insulating film. The surface is covered with a metal film with a surface having concavities and convexities which scatter reflected light. Size of the first opening portion is of the same level as a contact hole of a component and cannot be recognized by an image recognition apparatus. The metal film can be recognized by the image recognition apparatus. By forming a TiN film serving as a reflection prevention film on an end of the metal film, portions that can easily scatter light and a portion that cannot easily reflect light are adjacent in an alignment marker. A passivation film is formed on the interlayer insulating film and the TiN film. Recessed portions disposed in the metal film are exposed to a second opening portion formed in the passivation film and the TiN film.
    Type: Grant
    Filed: July 10, 2014
    Date of Patent: January 26, 2016
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Mutsuo Nishikawa, Yuko Fujimoto, Kazuhiro Matsunami
  • Patent number: 9200974
    Abstract: Aspects of a semiconductor pressure sensor device can include a semiconductor substrate having a depressed portion which forms a vacuum reference chamber, a diaphragm disposed on the front surface of the semiconductor substrate, and strain gauge resistors. The device can further include an aluminum wiring layer disposed on the semiconductor substrate, an antireflection film which is a TiN film disposed on the aluminum wiring layer, an adhesion securing and diffusion preventing layer which is a film stack of a Cr film and Pt film disposed on the TiN film, and an Au film stacked on the adhesion securing and diffusion preventing layer.
    Type: Grant
    Filed: June 24, 2014
    Date of Patent: December 1, 2015
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Kazuhiro Matsunami, Katsuyuki Uematsu, Mutsuo Nishikawa, Shigeru Shinoda
  • Publication number: 20150303935
    Abstract: An analog signal is supplied to a first conversion section of a physical quantity sensor device, converted to digital, and set to be an initial output value of the first conversion section. Adjustment information for the first conversion section is calculated based on the error between the initial output value and a target output value of the first conversion section. Before an initial output value of a physical quantity sensor is measured for calculating initial setting information of a physical quantity sensor device, the first conversion section is adjusted based on the adjustment information. Also, a digital signal is supplied to a second conversion section of the physical quantity sensor device, converted to analog, and set to be an initial output value of the second conversion section. The second conversion section is adjusted based on adjustment information for the second conversion section.
    Type: Application
    Filed: March 9, 2015
    Publication date: October 22, 2015
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Mutsuo NISHIKAWA, Katsuyuki UEMATSU, Kazuhiro MATSUNAMI
  • Publication number: 20150288354
    Abstract: A semiconductor device 3 for sensing a physical quantity adjusts the output characteristic of a pressure sensor, for example, based on trimming data stored in an EPROM 34. A comparator 311 compares an input voltage given to a terminal 43 and a predetermined reference voltage, and delivers a write control signal for EPROM 34. When the comparator 311 delivers a Low signal for the EPROM 34, a first gate circuit 312 provided between the terminal 43 and a temperature sensor 32 connects the terminal 43 and the temperature sensor 32. A second gate circuit 313 provided between the terminal 43 and a pull-down resistor 314 disconnects the terminal 43 and the pull-down resistor 314. The operational voltage of the temperature sensor 32 is lower than the reference voltage, and the terminal 43 is used as an output terminal for the temperature sensor 32.
    Type: Application
    Filed: March 9, 2015
    Publication date: October 8, 2015
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Katsuya KARASAWA, Mutsuo NISHIKAWA, Kazuhiro MATSUNAMI
  • Publication number: 20150285703
    Abstract: When a main body of a sensor chip (1) is in a grounded state, a shield layer (71) constituting a shield electrode formed on a circuit layer (72) is grounded through a resistor (46).
    Type: Application
    Filed: October 15, 2013
    Publication date: October 8, 2015
    Inventors: Takuro Ishikawa, Yuji Kanai, Kazuhiro Matsunami
  • Publication number: 20150287439
    Abstract: A semiconductor integrated circuit that exhibits an enhanced surge withstand voltage of a nonvolatile memory and has a reduced chip area, having a nonvolatile memory and a Zener diode connected in parallel between a write terminal and a ground terminal. The nonvolatile memory is connected to the write terminal by a write terminal line and to a common connection point by a first ground line. The cathode of the Zener diode is connected to the write terminal line. The anode of the Zener diode is connected to the specified connection point by a second ground line. The first ground line and the second ground line are connected to the specified connection point.
    Type: Application
    Filed: March 12, 2015
    Publication date: October 8, 2015
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Mutsuo NISHIKAWA, Kazuhiro MATSUNAMI, Yuko FUJIMOTO
  • Publication number: 20150021781
    Abstract: A semiconductor device has a plurality of first opening portions formed in an interlayer insulating film. The surface is covered with a metal film with a surface having concavities and convexities which scatter reflected light. Size of the first opening portion is of the same level as a contact hole of a component and cannot be recognized by an image recognition apparatus. The metal film can be recognized by the image recognition apparatus. By forming a TiN film serving as a reflection prevention film on an end of the metal film, portions that can easily scatter light and a portion that cannot easily reflect light are adjacent in an alignment marker. A passivation film is formed on the interlayer insulating film and the TiN film. Recessed portions disposed in the metal film are exposed to a second opening portion formed in the passivation film and the TiN film.
    Type: Application
    Filed: July 10, 2014
    Publication date: January 22, 2015
    Inventors: Mutsuo NISHIKAWA, Yuko FUJIMOTO, Kazuhiro MATSUNAMI
  • Patent number: 8934309
    Abstract: In aspects of the invention, an auxiliary memory circuit includes a shift register wherein a plurality of flip-flops are cascade-connected and a plurality of inversion circuits that invert and output outputs of each D flip-flop. A main memory circuit includes a switch, which acts in accordance with a signal from the auxiliary memory circuit, and an EPROM connected in series to the switch and driven by a writing voltage. A variable resistance circuit includes a switch, which acts in accordance with a signal from the auxiliary memory circuit, and a resistor connected in series to the switch. With aspects of the invention, it is possible for terminals of the writing voltage and a writing voltage to be commonized. Also, it is possible to provide a low-cost semiconductor physical quantity sensor device that can carry out electrical trimming with the voltage when writing into the EPROM kept constant.
    Type: Grant
    Filed: July 12, 2013
    Date of Patent: January 13, 2015
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Kazuhiro Matsunami, Mutsuo Nishikawa
  • Publication number: 20150001650
    Abstract: Aspects of a semiconductor pressure sensor device can include a semiconductor substrate having a depressed portion which forms a vacuum reference chamber, a diaphragm disposed on the front surface of the semiconductor substrate, and strain gauge resistors. The device can further include an aluminium wiring layer disposed on the semiconductor substrate, an antireflection film which is a TiN film disposed on the aluminium wiring layer, an adhesion securing and diffusion preventing layer which is a film stack of a Cr film and Pt film disposed on the TiN film, and an Au film stacked on the adhesion securing and diffusion preventing layer.
    Type: Application
    Filed: June 24, 2014
    Publication date: January 1, 2015
    Inventors: Kazuhiro MATSUNAMI, Katsuyuki UEMATSU, Mutsuo NISHIKAWA, Shigeru SHINODA
  • Publication number: 20140358317
    Abstract: A first acquiring unit acquires initial output values of a physical quantity sensor. A second acquiring unit acquires target output values for the physical quantity sensor. A first calculating unit extracts first characteristic values by calculating a second-order first characteristics formula which indicates corrected output characteristics of the physical quantity sensor, based on the initial output values and target output values of the physical quantity sensor extracts second characteristic values by calculating a second-order second characteristics formula for correcting the first characteristic values, based on a predetermined temperature and the first characteristic values. A computing unit computes a corrected output value for the physical quantity sensor based on the first characteristics formula which is corrected by inputting the second characteristic values to the second characteristics formula.
    Type: Application
    Filed: December 28, 2012
    Publication date: December 4, 2014
    Inventors: Mutsuo Nishikawa, Kazunori Saito, Katsuyuki Uematsu, Kazuhiro Matsunami, Keiichi Ito
  • Publication number: 20140330539
    Abstract: In aspects of the invention, an auxiliary memory circuit includes a shift register wherein a plurality of flip-flops are cascade-connected and a plurality of inversion circuits that invert and output outputs of each D flip-flop. A main memory circuit includes a switch, which acts in accordance with a signal from the auxiliary memory circuit, and an EPROM connected in series to the switch and driven by a writing voltage. A variable resistance circuit includes a switch, which acts in accordance with a signal from the auxiliary memory circuit, and a resistor connected in series to the switch. With aspects of the invention, it is possible for terminals of the writing voltage and a writing voltage to be commonized. Also, it is possible to provide a low-cost semiconductor physical quantity sensor device that can carry out electrical trimming with the voltage when writing into the EPROM kept constant.
    Type: Application
    Filed: July 18, 2014
    Publication date: November 6, 2014
    Inventors: Kazuhiro MATSUNAMI, Mutsuo NISHIKAWA
  • Publication number: 20130294171
    Abstract: In aspects of the invention, an auxiliary memory circuit includes a shift register wherein a plurality of flip-flops are cascade-connected and a plurality of inversion circuits that invert and output outputs of each D flip-flop. A main memory circuit includes a switch, which acts in accordance with a signal from the auxiliary memory circuit, and an EPROM connected in series to the switch and driven by a writing voltage. A variable resistance circuit includes a switch, which acts in accordance with a signal from the auxiliary memory circuit, and a resistor connected in series to the switch. With aspects of the invention, it is possible for terminals of the writing voltage and a writing voltage to be commonized. Also, it is possible to provide a low-cost semiconductor physical quantity sensor device that can carry out electrical trimming with the voltage when writing into the EPROM kept constant.
    Type: Application
    Filed: July 12, 2013
    Publication date: November 7, 2013
    Inventors: Kazuhiro MATSUNAMI, Mutsuo NISHIKAWA
  • Patent number: 8242976
    Abstract: In a display driving device which performs scan driving of a PDP or similar, to enable rapid scan operation, reduction of the chip size, and lowering of costs, as well as elimination of coupling problems. The display driving device is provided with a pull-up switching element Nu connected to a first driving voltage (VDH) supply line and common to all bits; diodes D1 to DN for each bit, connected between the pull-up switching element Nu and driving voltage output terminals for each bit; pull-down switching elements Nd1 to NdN for each bit, connected between a second driving voltage (GND) supply line and the driving voltage output terminals for each bit; and resistance elements R1 to RN for each bit, connected between the first driving voltage supply line and the pull-down switching elements Nd1 to NdN.
    Type: Grant
    Filed: November 16, 2007
    Date of Patent: August 14, 2012
    Assignees: Fuji Electric Systems Co., Ltd., L.G. Electronics, Inc.
    Inventors: Kazuhiro Matsunami, Hideto Kobayashi, Makoto Tanaka
  • Patent number: 8237505
    Abstract: This invention provides a low-current consumption type signal amplification circuit, which limits the output voltage to fix a lower-limit (upper-limit) saturation voltage of the amplification circuit at a predetermined lower-limit (upper-limit) limiting voltage. The signal amplification circuit comprises a negative feedback amplification circuit, a lower-limit voltage limiting circuit and an upper-limit voltage limiting circuit. The lower-limit voltage limiting circuit increases a resistance between an output terminal of the negative feedback amplification circuit and a ground terminal when the output voltage of the negative feedback amplification circuit falls below the lower-limit limiting voltage. The upper-limit voltage limiting circuit increases a resistance between the output terminal of the negative feedback amplification circuit and a high-potential side of a power supply when the output voltage of the negative feedback amplification circuit rises above the upper-limit limiting voltage.
    Type: Grant
    Filed: October 5, 2009
    Date of Patent: August 7, 2012
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Mutsuo Nishikawa, Katsuyuki Uematsu, Kazuhiro Matsunami