Patents by Inventor Kazuhiro Oyama

Kazuhiro Oyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11943398
    Abstract: A maintenance support system includes a network interface, a memory, and a processor configured to, upon receipt of first information indicating a status of a first apparatus via the network interface, store the first information in the memory, upon receipt of second information indicating a status of a second apparatus via the network interface, store the second information in the memory, and determine a priority of on-site maintenance between the first and second apparatuses based on the first and second information stored in the memory.
    Type: Grant
    Filed: April 27, 2023
    Date of Patent: March 26, 2024
    Assignee: Toshiba Tec Kabushiki Kaisha
    Inventors: Sou Miyazaki, Hiroyo Tanaka, Kazuhiro Ogura, Masaki Narahashi, Satoshi Oyama
  • Patent number: 11943414
    Abstract: An image processing apparatus includes a display device and a processor. The processor is configured to generate a first screen for display on the display device and on which one of a plurality of malfunctioning part candidates of the image processing apparatus and one of a plurality of timings at which a particular sound was output by the image processing apparatus that malfunctioned, are selectable, when a first malfunctioning part candidate and a first timing are selected on the first screen, generate a second screen for display on the display device and on which one or more reference sounds corresponding to the particular sound are selectable, and when one of the reference sounds is selected on the second screen, generate error information indicating the first malfunctioning part candidate and the selected reference sound.
    Type: Grant
    Filed: April 13, 2023
    Date of Patent: March 26, 2024
    Assignee: Toshiba Tec Kabushiki Kaisha
    Inventors: Sou Miyazaki, Hiroyo Tanaka, Kazuhiro Ogura, Masaki Narahashi, Satoshi Oyama, Tatsuya Inagi
  • Patent number: 11860247
    Abstract: A magnetic field generator includes: an upper layer resonance coil composed of a first conductive material and forming a loop circuit having a coil portion; a lower layer coil composed of a second conductive material and forming a loop circuit having a coil portion arranged opposite to the coil portion of the upper layer coil at a predetermined distance; and a substrate supporting the upper layer coil and the lower layer coil and having a dielectric material between the upper layer coil and the lower layer coil. A high-frequency current is supplied to the lower layer coil and a high-frequency current having a phase opposite to that of the high frequency current supplied to the lower layer coil flows through the upper layer coil. A length per loop of the coil portion in the upper layer coil and the coil portion in the lower layer coil is matched to one wavelength of the high-frequency current.
    Type: Grant
    Filed: February 24, 2023
    Date of Patent: January 2, 2024
    Assignee: DENSO CORPORATION
    Inventors: Yuki Anno, Takayuki Shibata, Kazuhiro Oyama
  • Publication number: 20230221384
    Abstract: A magnetic field generator includes: an upper layer coil composed of a first conductive material and forming a loop circuit having a coil portion; a lower layer coil composed of a second conductive material and forming a loop circuit having a coil portion arranged opposite to the coil portion of the upper layer coil at a predetermined distance; and a substrate supporting the upper layer coil and the lower layer coil and having a dielectric material between the upper layer coil and the lower layer coil. High-frequency currents of opposite phases are passed through the upper layer coil and the lower layer coil, respectively, and a length per loop of the coil portion in the upper layer coil and the coil portion in the lower layer coil is matched to one wavelength of the high-frequency current.
    Type: Application
    Filed: February 24, 2023
    Publication date: July 13, 2023
    Inventors: Yuki Anno, Takayuki Shibata, Kazuhiro Oyama
  • Patent number: 11686785
    Abstract: A magnetic field generator includes: an upper layer coil composed of a first conductive material and forming a loop circuit having a coil portion; a lower layer coil composed of a second conductive material and forming a loop circuit having a coil portion arranged opposite to the coil portion of the upper layer coil at a predetermined distance; and a substrate supporting the upper layer coil and the lower layer coil and having a dielectric material between the upper layer coil and the lower layer coil. High-frequency currents of opposite phases are passed through the upper layer coil and the lower layer coil, respectively, and a length per loop of the coil portion in the upper layer coil and the coil portion in the lower layer coil is matched to one wavelength of the high-frequency current.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: June 27, 2023
    Assignee: DENSO CORPORATION
    Inventors: Yuki Anno, Takayuki Shibata, Kazuhiro Oyama
  • Publication number: 20220268859
    Abstract: A magnetic field generator includes: an upper layer coil composed of a first conductive material and forming a loop circuit having a coil portion; a lower layer coil composed of a second conductive material and forming a loop circuit having a coil portion arranged opposite to the coil portion of the upper layer coil at a predetermined distance; and a substrate supporting the upper layer coil and the lower layer coil and having a dielectric material between the upper layer coil and the lower layer coil. High-frequency currents of opposite phases are passed through the upper layer coil and the lower layer coil, respectively, and a length per loop of the coil portion in the upper layer coil and the coil portion in the lower layer coil is matched to one wavelength of the high-frequency current.
    Type: Application
    Filed: February 18, 2022
    Publication date: August 25, 2022
    Inventors: Yuki Anno, Takayuki Shibata, Kazuhiro Oyama
  • Patent number: 10950723
    Abstract: In a semiconductor device with a wide gap semiconductor, a gate insulating film is made of a material having a barrier against a minor carrier in an n-type body layer and having no barrier against a minor carrier in a p-type drift layer. As a result, in the semiconductor device with the wide gap semiconductor, a reduction in a conduction loss can be achieved while realizing an improvement in blocking resistance and securing reliability of the gate insulating film.
    Type: Grant
    Filed: November 17, 2016
    Date of Patent: March 16, 2021
    Assignee: DENSO CORPORATION
    Inventor: Kazuhiro Oyama
  • Patent number: 10714606
    Abstract: A semiconductor device includes a conductive substrate, a channel forming layer, a first electrode, and a second electrode. The channel forming layer is located above the conductive substrate and includes at least one hetero-junction structure. The hetero-junction structure includes a first GaN-type semiconductor layer providing a drift region and a second GaN-type semiconductor layer having a bandgap energy greater than the first GaN-type semiconductor layer. A total fixed charge quantity of charges in the first GaN-type layer and the second GaN-type layer is from 0.5×1013 to 1.5×1013 cm?2. The charges in the first GaN-type layer and the second GaN-type layer include charges generated by the polarization in the first GaN-type layer. Accordingly, the semiconductor device capable of improving a break-down voltage and decreasing an on-resistance is obtained.
    Type: Grant
    Filed: September 5, 2016
    Date of Patent: July 14, 2020
    Assignee: DENSO CORPORATION
    Inventors: Youngshin Eum, Kazuhiro Oyama, Yasushi Higuchi, Yoshinori Tsuchiya, Shinichi Hoshi
  • Patent number: 10629716
    Abstract: A semiconductor device has a lateral switching device that includes a channel forming layer, a gate structure portion, a source electrode, a drain electrode, a third semiconductor layer, a fourth semiconductor layer, and a junction gate electrode. The gate structure portion has a gate insulating film provided in a recess portion of the channel forming layer and a MOS gate electrode functioning as a gate electrode of a MOS structure provided on the gate insulating film. The source electrode and the junction gate electrode are coupled through an electrode layer provided on an interlayer insulating film covering the MOS gate electrode. An end of the third semiconductor layer facing the drain electrode protrudes toward the drain electrode from an end of the fourth semiconductor layer facing the drain electrode by a distance in a range of 1 ?m to 5 ?m both inclusive.
    Type: Grant
    Filed: April 6, 2017
    Date of Patent: April 21, 2020
    Assignee: DENSO CORPORATION
    Inventors: Hiroyuki Tarumi, Kazuhiro Oyama, Youngshin Eum, Shinichi Hoshi
  • Patent number: 10403745
    Abstract: A nitride semiconductor device includes a horizontal switching device that includes a substrate, a channel forming layer, a source region, a drain region and a gate region. The source region and the drain region are arranged apart from each other in one direction along a plane of the substrate. The gate region is formed of a p-type semiconductor layer and is arranged between the source region and the drain region. The gate region is divided into multiple parts in a perpendicular direction along the plane of the substrate, the perpendicular direction being perpendicular to an arrangement direction in which the source region and the drain region are arranged. Accordingly, on-resistance is decreased while securing high breakdown voltage.
    Type: Grant
    Filed: June 14, 2016
    Date of Patent: September 3, 2019
    Assignee: DENSO CORPORATION
    Inventors: Yasushi Higuchi, Shinichi Hoshi, Kazuhiro Oyama
  • Publication number: 20190123187
    Abstract: A semiconductor device has a lateral switching device that includes a channel forming layer, a gate structure portion, a source electrode, a drain electrode, a third semiconductor layer, a fourth semiconductor layer, and a junction gate electrode. The gate structure portion has a gate insulating film provided in a recess portion of the channel forming layer and a MOS gate electrode functioning as a gate electrode of a MOS structure provided on the gate insulating film. The source electrode and the junction gate electrode are coupled through an electrode layer provided on an interlayer insulating film covering the MOS gate electrode. An end of the third semiconductor layer facing the drain electrode protrudes toward the drain electrode from an end of the fourth semiconductor layer facing the drain electrode by a distance in a range of 1 ?m to 5 ?m both inclusive.
    Type: Application
    Filed: April 6, 2017
    Publication date: April 25, 2019
    Inventors: Hiroyuki TARUMI, Kazuhiro OYAMA, Youngshin EUM, Shinichi HOSHI
  • Publication number: 20190027598
    Abstract: In a semiconductor device with a wide gap semiconductor, a gate insulating film is made of a material having a barrier against a minor carrier in an n-type body layer and having no barrier against a minor carrier in a p-type drift layer. As a result, in the semiconductor device with the wide gap semiconductor, a reduction in a conduction loss can be achieved while realizing an improvement in blocking resistance and securing reliability of the gate insulating film.
    Type: Application
    Filed: November 17, 2016
    Publication date: January 24, 2019
    Inventor: Kazuhiro OYAMA
  • Patent number: 10109727
    Abstract: A semiconductor device includes a lateral switching device having: a substrate; a channel forming layer that has a heterojunction structure made of a GaN layer and an AlGaN layer and is formed with a recessed portion, on the substrate; a gate structure part that includes a gate insulating film and a gate electrode formed in the recessed portion; and a source electrode and a drain electrode on opposite sides of the gate structure part on the channel forming layer. The AlGaN layer includes a first AlGaN layer that has an Al mixed crystal ratio determining a two dimensional electron gas density, and a second AlGaN layer that has an Al mixed crystal ratio smaller than that of the first AlGaN layer to induce negative fixed charge, and is disposed in contact with the gate structure part and spaced from the source electrode and the drain electrode.
    Type: Grant
    Filed: December 8, 2015
    Date of Patent: October 23, 2018
    Assignee: DENSO CORPORATION
    Inventors: Kazuhiro Oyama, Yasushi Higuchi, Seigo Oosawa, Masaki Matsui, Youngshin Eum
  • Publication number: 20180248026
    Abstract: A semiconductor device includes a conductive substrate, a channel forming layer, a first electrode, and a second electrode. The channel forming layer is located above the conductive substrate and includes at least one hetero-junction structure. The hetero-junction structure includes a first GaN-type semiconductor layer providing a drift region and a second GaN-type semiconductor layer having a bandgap energy greater than the first GaN-type semiconductor layer. A total fixed charge quantity of charges in the first GaN-type layer and the second GaN-type layer is from 0.5×1013 to 1.5×1013 cm?2. The charges in the first GaN-type layer and the second GaN-type layer include charges generated by the polarization in the first GaN-type layer. Accordingly, the semiconductor device capable of improving a break-down voltage and decreasing an on-resistance is obtained.
    Type: Application
    Filed: September 5, 2016
    Publication date: August 30, 2018
    Inventors: Youngshin EUM, Kazuhiro OYAMA, Yasushi HIGUCHI, Yoshinori TSUCHIYA, Shinichi HOSHI
  • Patent number: 10062747
    Abstract: In a semiconductor device, an AlGaN layer includes a first AlGaN layer and a second AlGaN layer. The second AlGaN layer is positioned between a gate structure portion and a drain electrode and is divided into multiple parts in an arrangement direction in which the gate structure portion and the drain electrode are arranged. A second Al mixed crystal ratio of the second AlGaN layer is less than a first Al mixed crystal ratio of the first AlGaN layer. Accordingly, the semiconductor device is a normally-off-type device and is capable of restricting a decrease of a breakdown voltage and an increase of an on-resistance.
    Type: Grant
    Filed: June 14, 2016
    Date of Patent: August 28, 2018
    Assignee: DENSO CORPORATION
    Inventors: Youngshin Eum, Kazuhiro Oyama, Yasushi Higuchi, Shinichi Hoshi
  • Publication number: 20180219086
    Abstract: A nitride semiconductor device includes a horizontal switching device that includes a substrate, a channel forming layer, a source region, a drain region and a gate region. The source region and the drain region are arranged apart from each other in one direction along a plane of the substrate. The gate region is formed of a p-type semiconductor layer and is arranged between the source region and the drain region. The gate region is divided into multiple parts in a perpendicular direction along the plane of the substrate, the perpendicular direction being perpendicular to an arrangement direction in which the source region and the drain region are arranged. Accordingly, on-resistance is decreased while securing high breakdown voltage.
    Type: Application
    Filed: June 14, 2016
    Publication date: August 2, 2018
    Applicant: DENSO CORPORATION
    Inventors: Yasushi HIGUCHI, Shinichi HOSHI, Kazuhiro OYAMA
  • Patent number: 9972992
    Abstract: A protection circuit of a semiconductor device includes a high electron mobility transistor and a protection element. Between the drain and the gate of the high electron mobility transistor, the protection element includes: a thyristor; and a first resistor connected in series to the thyristor. Between the source and the gate of the high electron mobility transistor, the protection element includes: a second resistor and an interrupter that is connected in series to the second resistor. The interrupter interrupts a flow of a current between the drain and the gate when the thyristor is turned off, and the interrupter permits the current to flow between the drain and the gate when the thyristor is turned on.
    Type: Grant
    Filed: May 28, 2014
    Date of Patent: May 15, 2018
    Assignee: DENSO CORPORATION
    Inventor: Kazuhiro Oyama
  • Publication number: 20180130873
    Abstract: In a semiconductor device, an AlGaN layer includes a first AlGaN layer and a second AlGaN layer. The second AlGaN layer is positioned between a gate structure portion and a drain electrode and is divided into multiple parts in an arrangement direction in which the gate structure portion and the drain electrode are arranged. A second Al mixed crystal ratio of the second AlGaN layer is less than a first Al mixed crystal ratio of the first AlGaN layer. Accordingly, the semiconductor device is a normally-off-type device and is capable of restricting a decrease of a breakdown voltage and an increase of an on-resistance.
    Type: Application
    Filed: June 14, 2016
    Publication date: May 10, 2018
    Inventors: Youngshin EUM, Kazuhiro OYAMA, Yasushi HIGUCHI, Shinichi HOSHI
  • Publication number: 20170345919
    Abstract: A semiconductor device includes a lateral switching device having: a substrate; a channel forming layer that has a heterojunction structure made of a GaN layer and an AlGaN layer and is formed with a recessed portion, on the substrate; a gate structure part that includes a gate insulating film and a gate electrode formed in the recessed portion; and a source electrode and a drain electrode on opposite sides of the gate structure part on the channel forming layer. The AlGaN layer includes a first AlGaN layer that has an Al mixed crystal ratio determining a two dimensional electron gas density, and a second AlGaN layer that has an Al mixed crystal ratio smaller than that of the first AlGaN layer to induce negative fixed charge, and is disposed in contact with the gate structure part and spaced from the source electrode and the drain electrode.
    Type: Application
    Filed: December 8, 2015
    Publication date: November 30, 2017
    Inventors: Kazuhiro OYAMA, Yasushi HIGUCHI, Seigo OOSAWA, Masaki MATSUI, Youngshin EUM
  • Patent number: 9711638
    Abstract: A semiconductor device includes a MISFET having: a diamond substrate; a drift layer having a first layer with a first density for providing a hopping conduction and a second layer with a second density lower than the first density, and having a ? dope structure; a body layer on the drift layer; a source region in an upper portion of the body layer; a gate insulation film on a surface of the body layer; a gate electrode on a surface of the gate insulation film; a first electrode electrically connected to the source region and a channel region; and a second electrode electrically connected to the diamond substrate. The MISFET flows current in the drift layer in a vertical direction, and the current flows between the first electrode and the second electrode.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: July 18, 2017
    Assignee: DENSO CORPORATION
    Inventors: Kazuhiro Oyama, Toshiharu Makino, Masahiko Ogura, Hiromitsu Kato, Daisuke Takeuchi, Satoshi Yamasaki, Norio Tokuda, Takao Inokuma, Takuma Minamiyama