Patents by Inventor Kazuhiro Saito

Kazuhiro Saito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220247959
    Abstract: A photoelectric converter includes a pixel array including a plurality of pixels, a capacitive coupling amplifier configured to amplify a signal output from the pixel array, and a delta-sigma AD converter configured to convert, into a digital signal, an analog signal output from the amplifier. The amplifier is formed by a plurality of first elements including an active element and a capacitive element. The delta-sigma AD converter is formed by a plurality of second elements including an active element and a capacitive element. A breakdown voltage of at least one of the plurality of second elements forming the delta-sigma AD converter is lower than a breakdown voltage of the plurality of first elements forming the amplifier.
    Type: Application
    Filed: February 2, 2022
    Publication date: August 4, 2022
    Inventors: Kazuhiro Saito, Kohichi Nakamura, Tetsuya Itano
  • Publication number: 20220246640
    Abstract: In one embodiment, a semiconductor device includes a substrate, insulating films and first films alternately stacked on the substrate, at least one of the first films including an electrode layer and a charge storage layer provided on a face of the electrode layer via a first insulator, and a semiconductor layer provided on a face of the charge storage layer via a second insulator. The device further includes at least one of a first portion including nitrogen and provided between the first insulator and the charge storage layer with an air gap provided in the first insulator, a second portion including nitrogen, provided between the charge storage layer and the second insulator, and including a portion protruding toward the charge storage layer, and a third portion including nitrogen and provided between the second insulator and the semiconductor layer with an air gap provided in the first insulator.
    Type: Application
    Filed: April 20, 2022
    Publication date: August 4, 2022
    Applicant: KIOXIA CORPORATION
    Inventors: Keiichi SAWA, Kazuhiro MATSUO, Kazuhisa MATSUDA, Hiroyuki YAMASHITA, Yuta SAITO, Shinji MORI, Masayuki TANAKA, Kenichiro TORATANI, Atsushi TAKAHASHI, Shouji HONDA
  • Patent number: 11404437
    Abstract: A semiconductor device includes a semiconductor layer containing metal atoms, a charge storage layer provided on a surface of the semiconductor layer via a first insulating film, and an electrode layer provided on a surface of the charge storage layer via a second insulating film. The thickness of the first insulating film is 5 nm or more and 10 nm or less. The concentration of the metal atoms in the semiconductor layer is 5.0×1017 [EA/cm3] or higher and 1.3×1020 [EA/cm3] or lower.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: August 2, 2022
    Assignee: KIOXIA CORPORATION
    Inventors: Yuta Saito, Shinji Mori, Keiichi Sawa, Kazuhisa Matsuda, Kazuhiro Matsuo, Hiroyuki Yamashita
  • Patent number: 11398494
    Abstract: In one embodiment, a semiconductor storage device includes a stacked body in which a plurality of conducting layers are stacked through a plurality of insulating layers in a first direction, a semiconductor layer penetrating the stacked body, extending in the first direction and including metal atoms, and a memory film including a first insulator, a charge storage layer and a second insulator that are provided between the stacked body and the semiconductor layer. The semiconductor layer surrounds a third insulator penetrating the stacked body and extending in the first direction, and at least one crystal grain in the semiconductor layer has a shape surrounding the third insulator.
    Type: Grant
    Filed: March 5, 2020
    Date of Patent: July 26, 2022
    Assignee: Kioxia Corporation
    Inventors: Yuta Saito, Shinji Mori, Atsushi Takahashi, Toshiaki Yanase, Keiichi Sawa, Kazuhiro Matsuo, Hiroyuki Yamashita
  • Publication number: 20220220910
    Abstract: To provide a controller and a control method for internal combustion engine which can reduce arithmetic load, while suppressing deterioration in the estimation accuracy of the parameter relevant to the combustion state, even if the error component of high frequency is included in the crank angle acceleration. A controller for internal combustion engine, by referring an unburning condition data, calculates a shaft torque in unburning in the vicinity of the top dead center in the burning condition; calculates an external load torque based on calculated shaft torque in unburning and the actual shaft torque in burning in the vicinity of the top dead center; calculates a shaft torque in unburning by referring the unburning condition data; calculates an increment of gas pressure torque by burning based on the shaft torque in unburning, the actual shaft torque in burning, and the external load torque.
    Type: Application
    Filed: October 18, 2021
    Publication date: July 14, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yuhei Matsushima, Tatsuhiko Takahashi, Junichi Inoue, Toshikatsu Saito, Kazuhiro Tokuyama, Kazuyo Kako
  • Patent number: 11378526
    Abstract: A faulted condition determination method is designed to detect a chromium content and a nickel content in a predetermined boundary region proximate to a boundary between a high-strength ferrite steel and a weld material in a welded joint in which the high-strength ferrite steel and another steel are welded together using the weld material containing nickel and to thereby determine the faulted condition of the predetermined boundary region based on the chromium content and the nickel content. Accordingly, it is possible to appropriately determine the faulted condition of welding of a replacement part in which a high-strength ferrite steel and another steel are welded together using a nickel-based weld material.
    Type: Grant
    Filed: February 7, 2019
    Date of Patent: July 5, 2022
    Assignees: MITSUBISHI HEAVY INDUSTRIES, LTD., NATIONAL INSTITUTE FOR MATERIALS SCIENCE
    Inventors: Nobuhiko Saito, Nobuyoshi Komai, Yuichi Hirakawa, Hiroaki Fukushima, Kota Sawada, Kazuhiro Kimura, Kaoru Sekido
  • Publication number: 20220028812
    Abstract: A semiconductor wafer has an edge support ring around a perimeter of the semiconductor wafer and conductive layer formed over a surface of the semiconductor wafer within the edge support ring. A first stencil is disposed over the edge support ring with first openings aligned with the conductive layer. The first stencil includes a horizontal portion over the edge support ring, and a step-down portion extending the first openings to the conductive layer formed over the surface of the semiconductor wafer. The horizontal portion may have a notch with the edge support ring disposed within the notch. A plurality of bumps is dispersed over the first stencil to occupy the first openings over the conductive layer. A second stencil is disposed over the edge support ring with second openings aligned with the conductive layer to deposit a flux material in the second openings over the conductive layer.
    Type: Application
    Filed: October 5, 2021
    Publication date: January 27, 2022
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Michael J. SEDDON, Takashi NOMA, Kazuhiro SAITO
  • Publication number: 20210360180
    Abstract: An imaging device includes: a first pad portion that is connected to a voltage supply line in an aperture pixel region, and to which a reference voltage from outside of the semiconductor substrate is supplied; and a second pad portion that is connected to the voltage supply line in the light-shielded pixel region, and to which the reference voltage from outside of the semiconductor substrate is supplied, the second pad portion being separated from the first pad portion.
    Type: Application
    Filed: April 27, 2021
    Publication date: November 18, 2021
    Inventors: Kazuhiro Saito, Hideo Kobayashi, Koichiro Iwata, Yoshiaki Takada, Satoshi Kato
  • Patent number: 11171547
    Abstract: One aspect of an electric actuator of the disclosure includes: a motor having a motor shaft rotating about a central axis; a speed reduction mechanism connected to a portion on one side in an axial direction of the motor shaft; a case accommodating the motor and the speed reduction mechanism; an output part to which rotation of the motor shaft is transmitted via the speed reduction mechanism; a rotation detector having a rotation sensor detecting rotation of the output part; and a wiring member electrically connected with the rotation sensor. The case has a first concave part located on an outer surface of the case. One end part of the wiring member penetrates the case from inside the case and protrudes inside the first concave part. The rotation sensor is located inside the first concave part and connected with one end part of the wiring member.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: November 9, 2021
    Assignee: NIDEC TOSOK CORPORATION
    Inventors: Hiroshi Shirai, Yutaka Uematsu, Kazuhiro Saito, Shuichi Kinjo, Toshihiko Akiba, Koichi Ishige
  • Patent number: 11164835
    Abstract: A semiconductor wafer has an edge support ring around a perimeter of the semiconductor wafer and conductive layer formed over a surface of the semiconductor wafer within the edge support ring. A first stencil is disposed over the edge support ring with first openings aligned with the conductive layer. The first stencil includes a horizontal portion over the edge support ring, and a step-down portion extending the first openings to the conductive layer formed over the surface of the semiconductor wafer. The horizontal portion may have a notch with the edge support ring disposed within the notch. A plurality of bumps is dispersed over the first stencil to occupy the first openings over the conductive layer. A second stencil is disposed over the edge support ring with second openings aligned with the conductive layer to deposit a flux material in the second openings over the conductive layer.
    Type: Grant
    Filed: January 15, 2018
    Date of Patent: November 2, 2021
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Michael J. Seddon, Takashi Noma, Kazuhiro Saito
  • Patent number: 11140345
    Abstract: In a solid state imaging device as an embodiment, an analog-to-digital converter unit converts, in a first period, a first pixel signal into a digital signal, performs, in a determination period after the first period, the comparison of a second pixel signal with the reference signal set to a predetermined threshold, and converts, in a second period after the determination period, the second pixel signal at a gain in accordance with a result of the comparison performed in the determination period into a digital signal. Until the reference signal reaches the threshold from the first period, the reference signal generation unit changes the reference signal without changing a direction of change of the reference signal with respect to the lapse of time.
    Type: Grant
    Filed: November 21, 2018
    Date of Patent: October 5, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kazuhiro Saito, Tetsuya Itano
  • Publication number: 20210300182
    Abstract: Provided is a control device comprising: a motor output decision unit configured to decide a magnitude of an output of the motor, based on a magnitude of a requested output that is an output requested to be supplied to drive wheels; a first rotation number decision unit configured to decide a first target value of a rotation number of the motor, based on the magnitude of the output of the motor decided by the motor output decision unit; and a display control unit configured to change a display method of the power indicator in a case where the motor supplies power to the drive wheels in a first mode and in a case where the motor supplies power to the drive wheels in a second mode different from the first mode.
    Type: Application
    Filed: March 26, 2021
    Publication date: September 30, 2021
    Inventors: Satoshi OHSHIMA, Naoki YUI, Kazuhiro SAITO, Yoshiharu SAITO, Takuya Iwata
  • Publication number: 20210291654
    Abstract: Provided is a control device configured to control an instrument configured to indicate a state of a moving body. The control device comprises a braking information acquisition unit configured to acquire braking information about a braking force of a braking unit configured to brake the moving body, and a display control unit configured to control display of the instrument, based on the braking information acquired by the braking information acquisition unit. The braking information includes at least one of (i) first braking information, which indicates a present setting, of a plurality of settings relating to the braking force of the braking unit and (ii) second braking information indicative of a present value of the braking force of the braking unit.
    Type: Application
    Filed: March 3, 2021
    Publication date: September 23, 2021
    Inventors: Kazuhiro SAITO, Naoki YUI, Satoshi OHSHIMA, Takuya Iwata
  • Publication number: 20210291655
    Abstract: A control device controls an instrument configured to indicate a state of a moving body. An instrument has a first object having a line shape or band shape that is continuously visually recognized, a second object indicative of a present value of an output index that is an index relating to an output energy amount, and a third object indicative of a present value of a regeneration index that is an index relating to a regenerative energy amount. A partial region on the first object is formed with an output region in which the present value of the output index is indicated by a position on the region, and a region different from the output region on the first object is formed with a regeneration region in which the present value of the regeneration index is indicated by a position on the region.
    Type: Application
    Filed: March 3, 2021
    Publication date: September 23, 2021
    Inventors: Kazuhiro SAITO, Yoshiharu SAITO, Naoki YUI, Satoshi OHSHIMA, Takuya Iwata
  • Publication number: 20210280627
    Abstract: The semiconductor device includes a first semiconductor component including a first circuit section and an interconnection connected to the first circuit section, and a second semiconductor component including a second circuit section and a third circuit section and stacked on the first semiconductor component. The interconnection is electrically connected to a first connecting portion and a second connecting portion of a plurality of connecting portions for electrically connecting the first semiconductor component and the second semiconductor component. The second circuit section is electrically connected to the interconnection via the first connecting portion. The third circuit section is electrically connected to the interconnection via the second connecting portion.
    Type: Application
    Filed: March 4, 2021
    Publication date: September 9, 2021
    Inventors: Kazuhiro Saito, Satoshi Kato
  • Patent number: 11045954
    Abstract: A plurality of robots each has a plurality of control modes including an automatic mode, a manual mode, and a corrected automatic mode in which the robot operates based on a task program while being sequentially corrected by the operator's manipulation. A first robot performs a first work to a work target in one of the corrected automatic mode and the manual mode, location data of the work target in a robot coordinate system of the first robot is acquired. Based on the location data of the work target in the robot coordinate system of the first robot and a relative relation between the robot coordinate system of the first robot and the robot coordinate system of the second robot, location data of the work target in a robot coordinate system of a second robot is corrected.
    Type: Grant
    Filed: February 9, 2018
    Date of Patent: June 29, 2021
    Assignee: KAWASAKI JUKOGYO KABUSHIKI KAISHA
    Inventors: Kazuhiro Saito, Yasunori Oyama, Akihiro Tokumoto
  • Publication number: 20210168309
    Abstract: A photoelectric converter includes pixels, vertical output lines to which a signal is outputted from the pixels, clippers configured to limit a potential of the output lines and a controller. Each of the clippers includes a first circuit configured to output an amplification signal according to a predetermined potential and the potential of the output line and a second circuit configured to supply a current according to the amplification signal to the output line. The controller controls each of the clippers to a state selected from states including a first state in which a range in which the potential of the output line can change is limited using the first and second circuits, and a second state in which the range in which the potential of the vertical output line can change is limited with an output of the second circuit deactivated.
    Type: Application
    Filed: November 24, 2020
    Publication date: June 3, 2021
    Inventors: Yu Arishima, Kazuhiro Saito
  • Patent number: 10910911
    Abstract: An electric actuator includes: a motor; a first case accommodating the motor; a second case located on one side in an axial direction of the first case; a bearing holder fixed to the first case; and a first bearing held by the bearing holder. The first case has a wall part covering the other side in the axial direction of a stator and having a through hole. The bearing holder has: a holder cylindrical part holding the first bearing and inserted into the through hole; and a holder flange part fixed to the wall part. An inner diameter of the through hole is larger than an outer diameter of the holder cylindrical part. At least a part of a radially outer surface of the holder cylindrical part in a circumferential direction is located in a position radially inside and away from a radially inner surface of the through hole.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: February 2, 2021
    Assignee: NIDEC TOSOK CORPORATION
    Inventors: Hiroshi Shirai, Shuichi Kinjo, Kazuhiro Saito
  • Publication number: 20210021782
    Abstract: A photoelectric conversion device includes: pixels forming columns and each configured to output a pixel signal; and comparator units provided to respective columns and each configured to receive the pixel signal from the pixels on a corresponding column and the reference signal. Each comparator unit includes a comparator having a first input node that receives the pixel signal and a second input node that receives the reference signal, a first capacitor that connects a reference signal line and the second input node, a second capacitor whose one electrode is connected to the second input node, and a select unit that connects the other electrode of the second capacitor to either the reference signal line or a reference voltage line. The other electrode of the second capacitor is connected to the reference signal line during first mode AD conversion and connected to the reference voltage line during second mode AD conversion.
    Type: Application
    Filed: June 30, 2020
    Publication date: January 21, 2021
    Inventors: Masaki Sato, Kazuhiro Saito, Tetsuya Itano, Kazuo Yamazaki, Hideo Kobayashi, Keigo Nakazawa
  • Publication number: 20210021770
    Abstract: An embodiment includes: a semiconductor substrate including a pixel well region and a peripheral well region; a pixel ground line arranged above the pixel well region; a pixel well contact between the pixel ground line and the pixel well region; pixels arranged to form columns in the pixel well region; a reference signal generation circuit arranged in the peripheral well region; and comparator units arranged in the peripheral well region, provided to respective columns, and each configured to receive the pixel signal from the pixels on a corresponding column and the reference signal. Each comparator unit includes a comparator having a first input node that receives the pixel signal and a second input node that receives the reference signal, a first capacitor unit between the reference signal generation circuit and the second input node, and a second capacitor unit between the second input node and the pixel ground line.
    Type: Application
    Filed: July 10, 2020
    Publication date: January 21, 2021
    Inventors: Keigo Nakazawa, Kazuhiro Saito, Tetsuya Itano, Kazuo Yamazaki, Hideo Kobayashi