Patents by Inventor Kazuhiro Saito

Kazuhiro Saito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9040887
    Abstract: Provided is an A/D converter including an input terminal, a reference signal line for supplying a reference signal which changes temporally, a comparator, a correction capacitor connected to an inverting input terminal of the comparator; and an output circuit which outputs digital data corresponding to an analog signal input to the input terminal. In a first state in which a total voltage of a first analog signal and an offset voltage of the comparator is held in the correction capacitor, a second analog signal input to the input terminal is supplied to a non-inverting input terminal of the comparator, and the second analog signal or the total voltage is changed using the reference signal, thereby outputting, from the output circuit, digital data.
    Type: Grant
    Filed: August 22, 2012
    Date of Patent: May 26, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kohichi Nakamura, Hiroki Hiyama, Tetsuya Itano, Kazuhiro Saito
  • Publication number: 20150130127
    Abstract: The image forming apparatus includes a first guide that defines a conveyance path and rotates about a fulcrum with the opening of the cover, the fulcrum being provided at a lower portion of the first guide, the conveyance path extending upward and downward and through which the sheet is conveyed; and a second guide that defines the conveyance path in combination with the first guide, the second guide being rotatable with the cover being open. The second guide moves in a direction away from the fulcrum with the opening of the cover.
    Type: Application
    Filed: November 11, 2014
    Publication date: May 14, 2015
    Inventor: Kazuhiro Saito
  • Patent number: 9029752
    Abstract: A solid-state imaging apparatus comprises a plurality of matrix pixels, a reference signal generator for generating a ramp signal, a counter for performing counting according to the ramp signal output, and an AD converter, arranged for each pixel column, for performing AD conversion by comparing a pixel signal from the pixel with the ramp signal. Further, the AD converter includes a comparator to which the pixel signal and the reference signal are input, a storage for storing the AD conversion result, and an slope converter, between the output terminal of the reference signal generator and the input terminal of the comparator, for changing a gradient of the ramp signal, so that the noise overlaid on the ramp signal changes depending on the gradient of the ramp signal. Thus, it is possible to prevent generation of a horizontal-line noise in the ramp signal.
    Type: Grant
    Filed: July 2, 2012
    Date of Patent: May 12, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazuhiro Saito, Hiroki Hiyama, Tetsuya Itano, Kohichi Nakamura
  • Publication number: 20150122975
    Abstract: A solid-state imaging apparatus comprises a plurality of matrix pixels, a reference signal generator for generating a ramp signal, a counter for performing counting according to the ramp signal output, and an AD converter, arranged for each pixel column, for performing AD conversion by comparing a pixel signal from the pixel with the ramp signal. Further, the AD converter includes a comparator to which the pixel signal and the reference signal are input, a storage for storing the AD conversion result, and an slope converter, between the output terminal of the reference signal generator and the input terminal of the comparator, for changing a gradient of the ramp signal, so that the noise overlaid on the ramp signal changes depending on the gradient of the ramp signal. Thus, it is possible to prevent generation of a horizontal-line noise in the ramp signal.
    Type: Application
    Filed: January 12, 2015
    Publication date: May 7, 2015
    Inventors: Kazuhiro Saito, Hiroki Hiyama, Tetsuya Itano, Kohichi Nakamura
  • Patent number: 9001247
    Abstract: A method drives an imaging system including: a plurality of pixels; an amplifier having an input node connected to the plurality of pixels via an input capacitor, and an output node connected to the input node via a feedback capacitor; and a reset unit configured to reset the input node to a base potential. The method includes the steps of: causing the input capacitor to hold noise output from one of the plurality of pixels; adding signals output from the two or more pixels in the feedback capacitor; and obtaining a difference between a signal applying a gain to a base signal output from the amplifier according to the reset of the input node of the amplifier and the signal added in the feedback capacitor.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: April 7, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazuhiro Saito, Yasushi Matsuno
  • Patent number: 8994866
    Abstract: A photoelectric conversion device includes a counter circuit configured to count a first clock signal to output a count signal thereof, a second clock signal generation unit configured to generate a second clock signal based on the first clock signal, and a clock synchronization unit configured to output a count start signal in synchronization with the second clock signal, wherein the counter circuit performs a counting operation in response to the count start signal synchronized with the second clock signal.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: March 31, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kohichi Nakamura, Hiroki Hiyama, Tetsuya Itano, Kazuhiro Saito, Yu Maehashi, Koichiro Iwata
  • Publication number: 20150080322
    Abstract: Sustained-release compositions wherein a water-soluble physiologically active peptide is substantially uniformly dispersed in a microcapsule comprised of a lactic acid polymer or a salt thereof, and the physiologically active substance is contained in an amount of 15 to 35 wt/wt % to the total microcapsules and weight-average molecular weight (Mw) of the lactic acid polymer is about 11,000 to about 27,000, which is characterized by having a high content of the physiologically active substance, and suppression of the initial excessive release within one day after the administration and a stable drug sustained-release over a long period of time, and method for producing the same.
    Type: Application
    Filed: November 19, 2014
    Publication date: March 19, 2015
    Applicant: Takeda Pharmaceutical Company Limited
    Inventors: Tomomichi Futo, Kazuhiro Saito, Tetsuo Hoshino, Masuhisa Hori
  • Patent number: 8979480
    Abstract: A plurality of blades are studded in a rotor disc integrated with the rotor along the circumferential direction of the rotor, a plurality of vanes are attached to a casing covering the rotor along the circumferential direction of the rotor, and an internal diaphragm disposed on rotor-side surfaces of the vanes in such a way that the internal diaphragm faces the rotor disc. The vanes and the blades adjacent to each other in the axial direction of the rotor form a turbine stage. A rotor-side cooling path is formed through the rotor disc in the axial direction of the rotor, and a diaphragm-side cooling path is formed through the internal diaphragm in the axial direction of the rotor, and a cooling medium flowing through the rotor-side cooling path diverts into the diaphragm-side cooling path and a labyrinth flow path provided between the internal diaphragm and the rotor.
    Type: Grant
    Filed: January 15, 2010
    Date of Patent: March 17, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Asako Inomata, Katsuya Yamashita, Kazuhiro Saito, Takao Inukai, Kazutaka Ikeda
  • Patent number: 8971393
    Abstract: An average quantization error value of each of I, P, and B pictures in an encoded unit of processing is calculated as an actually measured value having a large variation. An average quantization error value of each of I, P, and B pictures in an uncoded unit of processing is set as a target value having a small variation. In the encoding of the uncoded unit of processing, a result of the encoding of the encoded unit of processing is referenced and fed back thereto. By uniformly setting respective quantization errors of images and further by uniformly setting the respective qualities of the images, the image quality of a whole stream can be subjectively improved. Since the prefetch of the uncoded unit of processing is not needed, it is possible to perform real-time processing without any increase in the circuit scale.
    Type: Grant
    Filed: March 18, 2009
    Date of Patent: March 3, 2015
    Assignee: MegaChips Corporation
    Inventors: Makoto Saito, Kazuhiro Saito
  • Publication number: 20150016750
    Abstract: An image processor includes a memory including multiple memory banks each having multiple unit storage areas and holding an image, an image processing unit that processes an image, and an access controller that controls an access from the image processing unit to the memory. In storing the image in the memory, the access controller splits the image in multiple groups of unit pixel data pieces including pixel data of multiple columns by multiple rows, and stores groups of unit pixel data pieces aligned in at least two columns in a pixel space in the same unit storage area in the same memory bank.
    Type: Application
    Filed: November 30, 2012
    Publication date: January 15, 2015
    Applicant: MegaChips Corporation
    Inventors: Kazuhiro Saito, Akira Okamoto
  • Patent number: 8928786
    Abstract: A solid-state imaging apparatus includes: a plurality of pixels arranged in a matrix; a plurality of amplifier circuits each arranged correspondingly to each of columns of the pixels, for amplifying a signal from the pixel; and a current source transistor whose source is supplied with a power source voltage and which supplies the amplifier circuit with a bias current. When the current source transistor is operating in the saturation region, the gate voltage of the current source transistor that is supplied from the bias line is sampled and held. The gate voltage of the current source transistor with respect to the power source voltage is controlled to the sampled voltage, thereby suppressing variation. This suppression can, in turn, suppress occurrence of line noise and a lateral smear due to difference of drop in voltage of a power source line concerning a column circuit on each row.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: January 6, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Koichiro Iwata, Hiroki Hiyama, Tetsuya Itano, Kohichi Nakamura, Kazuhiro Saito
  • Patent number: 8921326
    Abstract: Sustained-release compositions wherein a water-soluble physiologically active peptide is substantially uniformly dispersed in a microcapsule comprised of a lactic acid polymer or a salt thereof, and the physiologically active substance is contained in an amount of 15 to 35 wt/wt % to the total microcapsules and weight-average molecular weight (Mw) of the lactic acid polymer is about 11,000 to about 27,000, which is characterized by having a high content of the physiologically active substance, and suppression of the initial excessive release within one day after the administration and a stable drug sustained-release over a long period of time, and method for producing the same.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: December 30, 2014
    Assignee: Takeda Pharmaceutical Company Limited
    Inventors: Tomomichi Futo, Kazuhiro Saito, Tetsuo Hoshino, Masuhisa Hori
  • Patent number: 8918024
    Abstract: A development device having: a main unit having formed therein a first space and a second space extending in a first direction perpendicular to a vertical direction, a first communicating portion and a second communicating portion that allow the first space and the second space to communicate with each other at both ends in the first direction; a first stirring member that extends in the first direction within the first space; a second stirring member that is positioned within the first space between the first stirring member and the second space and extends in the first direction; a conveyance member that extends in the first direction within the second space; and a developer support member that extends in the first direction within the second space.
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: December 23, 2014
    Assignee: Konica Minolta, Inc.
    Inventors: Kazuhiro Saito, Junji Murauchi, Tomohiro Kato, Tetsuya Kagawa, Hiroaki Takada
  • Publication number: 20140369718
    Abstract: A developing device includes: a developer container section configured to contain therein a two-component developer composed of toner and magnetic carrier; a developer bearing member configured to supply the developer to an image bearing member on which an electrostatic latent image is formed; a toner supplying section configured to supply the toner to the developer container section via the toner supply port; a carrier supplying section provided separately from the toner supplying section, the carrier supplying section being configured to supply the carrier to the developer container section via the carrier supply port; and a carrier detection section disposed at a position near the carrier supply port and at a same level as a powder surface of the developer contained in the developer container section, the carrier detection section being configured to detect carrier supplied from the carrier supplying section.
    Type: Application
    Filed: May 27, 2014
    Publication date: December 18, 2014
    Applicant: Konica Minolta, Inc.
    Inventors: Tatsuya FURUTA, Tomohiro KAWASAKI, Kazuteru ISHIZUKA, Kazuhiro SAITO
  • Publication number: 20140369562
    Abstract: An image processor includes an LSRAM accessible with a higher speed than a frame memory and configured to hold a second image in a predetermined range of a first image, an image production unit configured to read an image in a predetermined range of the second image and produce a third image for rough search based on the read image, an MSRAM accessible with a higher speed than the frame memory and configured to hold the third image, a first search unit configured to read the third image and perform first motion search based on the third image, and a second search unit configured to read a fourth image in a predetermined range of the second image based on a search result by the first search unit and perform second motion search that is more detailed than the first motion search based on the fourth image.
    Type: Application
    Filed: November 30, 2012
    Publication date: December 18, 2014
    Applicant: MegaChips Corporation
    Inventors: Kazuhiro Saito, Yujiro Tani, Shinichi Murata
  • Publication number: 20140348435
    Abstract: In a high-speed mode, a software processing unit notifies a hardware processing unit of settings information about output pictures before the hardware processing unit starts to encode an input picture, and the hardware processing unit performs continuous encoding for the output pictures, based on the settings information notified of by the software processing unit, without a notification signifying a completion for every picture, and upon completion of encoding for all of a specified number of the output pictures, sends an interrupt notification signifying a completion of encoding to the software processing unit.
    Type: Application
    Filed: May 22, 2014
    Publication date: November 27, 2014
    Applicant: MegaChips Corporation
    Inventor: Kazuhiro SAITO
  • Publication number: 20140334688
    Abstract: An image processor includes an LSRAM accessible with a higher speed than a frame memory and configured to hold a second image in a predetermined range of a first image, an image production unit configured to read an image in a predetermined range of the second image from the LSRAM and produce a third image for rough search based on the read image, an MSRAM accessible with a higher speed than the frame memory and configured to hold the third image produced by the image production unit, a search unit configured to read the third image from the MSRAM and perform first motion search based on the third image, and a search unit configured to read a fourth image in a predetermined range of the second image from the LSRAM based on a search result by the search unit and perform second motion search that is more detailed than the first motion search based on the fourth image.
    Type: Application
    Filed: November 30, 2012
    Publication date: November 13, 2014
    Applicant: MegaChips Corporation
    Inventors: Kazuhiro Saito, Yujiro Tani, Motoaki Yasui
  • Patent number: 8858158
    Abstract: A steam turbine 10 is comprised of a double-structured casing configured of an outer casing 21 and an inner casing 20, a turbine rotor 23 disposed through the inner casing and having a plurality of stages of moving blades 22 implanted, and a plurality of stages of stationary blades 25 disposed alternately with the moving blades 22 in the axial direction of the turbine rotor 23 in the inner casing 20. The steam turbine 10 is further provided with a discharge passage 30 which externally guides steam, which has flown in the inner casing and passed the final stage moving blades while performing expansion work, directly from the inner casing interior.
    Type: Grant
    Filed: August 6, 2009
    Date of Patent: October 14, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazutaka Ikeda, Katsuya Yamashita, Takao Inukai, Kazuhiro Saito, Kouichi Kitaguchi, Shogo Iwai, Shigekazu Miyashita
  • Publication number: 20140294098
    Abstract: In the multi mode, the software processing unit notifies the hardware processing unit by batch of multiple settings information sets about multiple output pictures before the hardware processing unit starts to encode an input picture, and the hardware processing unit performs continuous encoding for the output pictures, based on the settings information sets notified of by the software processing unit, without a notification signifying a completion for every picture, and upon completion of encoding for all of the output pictures, sends an interrupt notification signifying a completion of encoding to the software processing unit.
    Type: Application
    Filed: March 28, 2014
    Publication date: October 2, 2014
    Applicant: MegaChips Corporation
    Inventor: Kazuhiro SAITO
  • Patent number: 8848079
    Abstract: A solid-state imaging device includes a plurality of pixels arranged in a matrix, a plurality of readout circuits provided in each column of the plurality of pixels arranged in a matrix, configured to read out for each column a signal of the plurality of pixels, a plurality of comparison units configured to compare a signal output from the plurality of readout circuits with a reference signal whose level changes with time, a counter configured to perform a count operation from when the level of the reference signal starts to change, first and second buffers each configured to buffer a count value of the counter, and a plurality of storing units connected to the plurality of comparison units, configured to store a count value of the counter when a magnitude relation between a signal output from the plurality of the readout circuits and the reference signal is inverted.
    Type: Grant
    Filed: September 27, 2012
    Date of Patent: September 30, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tetsuya Itano, Hiroki Hiyama, Kazuhiro Saito, Kohichi Nakamura, Koichiro Iwata, Takeshi Akiyama, Kazuo Yamazaki, Daisuke Yoshida