Abstract: Provided is a technique capable of improving test efficiency of semiconductor devices. A test apparatus includes a probe card having a plurality of measurement sites that contact with a plurality of semiconductor devices formed on a semiconductor wafer; a control unit configured to generate map information, probe-card form information, and contact-position information, the map information including position information and peculiar information of the semiconductor devices on the semiconductor wafer, the probe-card form information including arrangement information of the measurement sites, the contact-position information indicating a contact position that is a range of the semiconductor device tested at one time by the probe card based on constrained-condition information of limiting contact with the probe card; and a position control unit configured to control a relative position between the probe card and the semiconductor wafer based on the contact-position information.

Abstract: Provided is a technique capable of improving test efficiency of semiconductor devices. A test apparatus includes a probe card having a plurality of measurement sites that contact with a plurality of semiconductor devices formed on a semiconductor wafer; a control unit configured to generate map information, probe-card form information, and contact-position information, the map information including position information and peculiar information of the semiconductor devices on the semiconductor wafer, the probe-card form information including arrangement information of the measurement sites, the contact-position information indicating a contact position that is a range of the semiconductor device tested at one time by the probe card based on constrained-condition information of limiting contact with the probe card; and a position control unit configured to control a relative position between the probe card and the semiconductor wafer based on the contact-position information.

Abstract: This invention is to detect defective products of semiconductor devices with high accuracy even when the characteristics of the semiconductor devices vary according to their positions on each of wafers.

Abstract: This invention is to detect defective products of semiconductor devices with high accuracy even when the characteristics of the semiconductor devices vary according to their positions on each of wafers.

Abstract: A data processing apparatus for processing and protecting data stored in a removable storage medium, including a medium monitoring unit configured to monitor the state of the removable storage medium, an information storage unit configured to store information, and a controller configured to move the data from the removable storage medium to the information storage unit in accordance with the monitoring result of the medium monitoring unit.

Abstract: A screening apparatus includes: a measurement unit measuring characteristics of a semiconductor device and reading an identification code allocated to the semiconductor device; a database storing a table representing a correspondence between an identification code and a fabrication condition of a semiconductor device; a conversion unit extracting, based on the identification code sent from the measurement unit, a corresponding fabrication condition from the database and associating the extracted fabrication condition with the characteristics corresponding to the fabrication condition; a characteristics reconstruction unit classifying the characteristics according to the fabrication condition sent from the conversion unit; and an evaluation and analysis unit evaluating and analyzing the characteristics classified by the characteristics reconstruction unit according to the fabrication condition in a predetermined manner and determining a semiconductor device to be screened.

Abstract: An information processing method includes a storing step of storing a correspondence between destination names and e-mail addresses in a storage unit; a setting step of setting a destination name to which a document is to be transmitted; and an upload step of uploading the document to a document management server for a network printing in accordance with an e-mail address corresponding to the set destination name, a document being uploaded to the document management server and then being output in response to an output request from an owner of the e-mail address in the network printing. The uploaded document can be downloaded from the document management server to a printer through a communication medium and can be printed.

Abstract: An apparatus for sampling a power supply current value for performing frequency analysis of the power supply current flowing in an integrated circuit with a test signal applied to the integrated circuit has a power supply generating a prescribed supply of power for the integrated circuit (DUT: device under test), a current detection means for observing the power supply current value supplied from the power supply to the DUT, a test signal generation means for generating a prescribed test signal to be applied to an input/output terminal other than a power supply terminal of the DUT and for generating a test signal application signal during application of the test signal to the DUT, a sampling means for sampling the power supply current value signal, a sampling time determining means for instructing the sampling means with regard to the start and end timing for sampling, based on the test signal application signal, a sampling data storage means for storing data sampled by the sampling means, a Fourier transform

Abstract: A data processing apparatus includes a position-information acquisition unit adapted to acquire position information of the data processing apparatus, a key-generation unit adapted to generate a key dependent on the position information acquired by the position-information acquisition unit, an encryption unit adapted to generate encrypted data by encrypting data using the key generated by the key-generation unit, a recording unit adapted to record the encrypted data onto an external recording medium, and a decryption unit adapted to decrypt the encrypted data recorded onto the external recording medium by using a key that is dependent on the position information acquired by the position-information acquisition unit and that is generated by the key-generation unit.

Abstract: An apparatus for sampling a power supply current value for performing frequency analysis of the power supply current flowing in an integrated circuit with a test signal applied to the integrated circuit has a power supply generating a prescribed supply of power for the integrated circuit (DUT: device under test), a current detection means for observing the power supply current value supplied from the power supply to the DUT, a test signal generation means for generating a prescribed test signal to be applied to an input/output terminal other than a power supply terminal of the DUT and for generating a test signal application signal during application of the test signal to the DUT, a sampling means for sampling the power supply current value signal, a sampling time determining means for instructing the sampling means with regard to the start and end timing for sampling, based on the test signal application signal, a sampling data storage means for storing data sampled by the sampling means, a Fourier transform

Abstract: An apparatus for sampling a power supply current value for performing frequency analysis of the power supply current flowing in an integrated circuit with a test signal applied to the integrated circuit has a power supply generating a prescribed supply of power for the integrated circuit (DUT: device under test), a current detection means for observing the power supply current value supplied from the power supply to the DUT, a test signal generation means for generating a prescribed test signal to be applied to an input/output terminal other than a power supply terminal of the DUT and for generating a test signal application signal during application of the test signal to the DUT, a sampling means for sampling the power supply current value signal, a sampling time determining means for instructing the sampling means with regard to the start and end timing for sampling, based on the test signal application signal, a sampling data storage means for storing data sampled by the sampling means, a Fourier transform

Abstract: An observation apparatus according to one embodiment can include a timing generating unit (2) that generates a timing signal at a predetermined period. A sampling unit (3) can sample a current observation signal of a power supply current on the basis of the timing signal, and store sampled data in data storing unit (5). A data number adjusting unit (6) can adjust the number of data samples to a number that is a power of two. An arithmetic operating unit (4) can Fourier-transform the adjusted data to generate frequency spectrum results of the current observation signal. In addition, a failure inspection apparatus according to one embodiment analyzes the frequency spectrum of an integrated circuit under observation to determine a failure condition of the integrated circuit.

Abstract: An information processing method includes a storing step of storing a correspondence between destination names and e-mail addresses in a storage unit; a setting step of setting a destination name to which a document is to be transmitted; and an upload step of uploading the document to a document management server for a network printing in accordance with an e-mail address corresponding to the set destination name, a document being uploaded to the document management server and then being output in response to an output request from an owner of the e-mail address in the network printing. The uploaded document can be downloaded from the document management server to a printer through a communication medium and can be printed.

Abstract: A method of detecting a failure in an IC, based on spectrum which is a result of analyzing a frequency of a current running through an IC when a test signal is applied to the IC, including (a) assuming that all ICs under test define a under-test IC set, and testing each one of the ICs in the under-test IC set in a conventional manner; (b) removing ICs judged to be in failure in (a), from the under-test IC set; (c) measuring spectrum of a current supplied from a power source into each one of the ICs in the under-test IC set; (d) calculating both a mean value and standard deviation of the spectrum for the under-test IC set; (e) judging whether an IC is in failure, based on both the mean value and the standard deviation of the spectrum; (f) removing ICs judged to be in failure in (e), from the under-test IC set; and (g) judging the undertest IC set to be in no failure.

Abstract: A data processing apparatus for processing and protecting data stored in a removable storage medium, including a medium monitoring unit configured to monitor the state of the removable storage medium, an information storage unit configured to store information, and a controller configured to move the data from the removable storage medium to the information storage unit in accordance with the monitoring result of the medium monitoring unit.

Abstract: A unit test signal having duration T is repeatedly supplied from an LSI tester to an IC under test and, simultaneously, a power source current is supplied from the LSI tester through a current detection unit to the IC under test. The power source current is monitored by the current detection unit and a current information obtained by the monitoring is analyzed by a spectrum analyzer unit. Since the repetition period of the test signal is T, the power source current having a period nT flows through the IC under test along with a state shift of the IC under test, where n is an integer. When the IC under test has a fault, the power source current flows with a period n′T, where n′ is an integer different from n, or an abnormal power source current flows with the period nT, due to a change of the state shift of the IC under test.

Abstract: Detecting failed integrated circuit among integrated circuits by (a) assuming that all integrated circuits under test define under-test set, and testing each one of the integrated circuits in under-test set, (b) removing integrated circuits judged to be in failure in step (a) from the under-test set, (c) measuring spectrum of a current supplied from power source into each one of integrated circuits in under-test set, (d) calculating both mean value and standard deviation of spectrum for under-test set, (e) judging whether an integrated circuit is in failure or not, based on both the mean value and the standard deviation of the spectrum, (f) removing integrated circuits having been judged to be in failure in step (e) from under-test set, and (g) judging under-test set to be in no failure. Thus, it is possible to find failed integrated circuits without preparing data of integrated circuit in no failure, as a reference.

Abstract: An observation apparatus according to one embodiment can include a timing generating unit (2) that generates a timing signal at a predetermined period. A sampling unit (3) can sample a current observation signal of a power supply current on the basis of the timing signal, and store sampled data in data storing unit (5). A data number adjusting unit (6) can adjust the number of data samples to a number that is a power of two. An arithmetic operating unit (4) can Fourier-transform the adjusted data to generate frequency spectrum results of the current observation signal. In addition, a failure inspection apparatus according to one embodiment analyzes the frequency spectrum of an integrated circuit under observation to determine a failure condition of the integrated circuit.

Abstract: Detecting failed integrated circuit among integrated circuits, by (a) assuming that all integrated circuits under test define under-test set, and testing each one of the integrated circuits in the under-test set, (b) removing integrated circuits judged to be in failure in step (a) from the under-test set, (c) measuring spectrum of a current supplied from a power source into each one of integrated circuits in under-test set, (d) calculating both mean value and standard deviation of spectrum for under-test set, (e) judging whether an integrated circuit is in failure or not, based on both the mean value and the standard deviation of the spectrum, (f) removing integrated circuits having been judged to be in failure in step (e), from the under-test set, and (g) judging under-test set to be in no failure. Thus, it possible to find failed integrated circuits without preparing data of integrated circuit in no failure, as a reference.

Abstract: There is provided a method of detecting an integrated circuit in failure among integrated circuits, based on spectrum which is a result of analyzing a frequency of a current running through an integrated circuit when a test signal is applied to the integrated circuit, comprising the steps of (a) assuming that all integrated circuits under test define a under-test integrated circuit set, and testing each one of the integrated circuits in the under-test integrated circuit set in a conventional manner, (b) removing integrated circuits having been judged to be in failure in the step (a), from the under-test integrated circuit set, (c) measuring spectrum of a current supplied from a power source into each one of the integrated circuits in the under-test integrated circuit set, (d) calculating both a mean value and standard deviation of the spectrum for the under-test integrated circuit set, (e) judging whether an integrated circuit is in failure or in no failure, based on both the mean value and the standard devia