Patents by Inventor Kazuhiro Sasada
Kazuhiro Sasada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8410557Abstract: A P type drift layer is formed in an N type epitaxial layer from under a drain layer to under an N type body layer under a source layer through under an element isolation insulation film. This P type drift layer is shallower immediately under the drain layer than under the element isolation insulation film, and gradually shallows from under the element isolation insulation film to the N type body layer to be in contact with the bottom of the N type body layer. Since the P type drift layer is thus diffused in a wide region, a wide current path is formed from the N type body layer to the drain layer, and the current drive ability is enhanced and the drain breakdown voltage is also increased.Type: GrantFiled: June 17, 2009Date of Patent: April 2, 2013Assignee: Semiconductor Components Industries, LLCInventors: Haruki Yoneda, Kazuhiro Sasada
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Patent number: 8319281Abstract: A semiconductor device capable of inhibiting a fabricating process from complication while inhibiting the dielectric strength voltage of a insulating film from reduction is obtained. This semiconductor device includes a groove portion, an insulating film formed on a surface of the groove portion, a gate electrode and a source impurity region, wherein upper ends of the gate electrode, which are portions in contact with the insulating film, are each located at a position identical with or deeper than the range of an impurity introduced from a surface of a semiconductor substrate with respect to the insulating film in order to form the source impurity region and above a lower surface of the source impurity region.Type: GrantFiled: December 27, 2007Date of Patent: November 27, 2012Assignee: Sanyo Electric, Co., Ltd.Inventors: Yoshikazu Yamaoka, Satoru Shimada, Kazunori Fujita, Kazuhiro Sasada
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Patent number: 8149051Abstract: A solid-state image sensor capable of suppressing color mixture while suppressing increase of load capacitances of transfer gates and a short circuit between two adjacent transfer gates is provided. This solid-state image sensor comprises a plurality of transfer gates and a shielding material line blocking light incident from above a prescribed pixel upon another pixel adjacent to the prescribed pixel. The shielding material line has a downward projecting portion on a region corresponding to at least one transfer gate entering an ON-state in photoreception.Type: GrantFiled: January 27, 2006Date of Patent: April 3, 2012Assignee: Semiconductor Components Industries, LLCInventors: Yoshinari Ichihashi, Ryu Shimizu, Kazuhiro Sasada
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Patent number: 7968941Abstract: A semiconductor device includes: an epitaxial layer; a body layer, formed in the epitaxial layer, which includes a channel region; a source layer disposed in superposition on the body layer; a gate insulator, formed on the epitaxial layer, which is in a ring shape surrounding the source layer; a gate electrode formed through the gate insulator; a drift layer, formed in the epitaxial layer, which is in a ring shape surrounding the body layer; and a drain layer formed in the surface of the epitaxial layer and disposed opposite to the source layer. The body layer is disposed such that the boundary surface at an end in the gate-width direction is in contact with the undersurface of the gate insulator. The gate insulator has a thick film portion thicker than a part above the channel region in the gate-length direction at least in a part where the gate insulator is in contact with the boundary surface of the body layer at the end in the gate-width direction.Type: GrantFiled: March 27, 2009Date of Patent: June 28, 2011Assignee: Sanyo Electric Co., Ltd.Inventors: Kazunori Fujita, Tomio Yamashita, Haruki Yoneda, Kazuhiro Sasada
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Publication number: 20090321852Abstract: A P type drift layer is formed in an N type epitaxial layer from under a drain layer to under an N type body layer under a source layer through under an element isolation insulation film. This P type drift layer is shallower immediately under the drain layer than under the element isolation insulation film, and gradually shallows from under the element isolation insulation film to the N type body layer to be in contact with the bottom of the N type body layer. Since the P type drift layer is thus diffused in a wide region, a wide current path is formed from the N type body layer to the drain layer, and the current drive ability is enhanced and the drain breakdown voltage is also increased.Type: ApplicationFiled: June 17, 2009Publication date: December 31, 2009Applicant: SANYO Electric Co., Ltd.Inventors: Haruki YONEDA, Kazuhiro Sasada
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Publication number: 20090242981Abstract: A semiconductor device includes: an epitaxial layer; a body layer, formed in the epitaxial layer, which includes a channel region; a source layer disposed in superposition on the body layer; a gate insulator, formed on the epitaxial layer, which is in a ring shape surrounding the source layer; a gate electrode formed through the gate insulator; a drift layer, formed in the epitaxial layer, which is in a ring shape surrounding the body layer; and a drain layer formed in the surface of the epitaxial layer and disposed opposite to the source layer. The body layer is disposed such that the boundary surface at an end in the gate-width direction is in contact with the undersurface of the gate insulator. The gate insulator has a thick film portion thicker than a part above the channel region in the gate-length direction at least in a part where the gate insulator is in contact with the boundary surface of the body layer at the end in the gate-width direction.Type: ApplicationFiled: March 27, 2009Publication date: October 1, 2009Applicant: SANYO Electric Co., Ltd.Inventors: Kazunori Fujita, Tomio Yamashita, Haruki Yoneda, Kazuhiro Sasada
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Publication number: 20080185638Abstract: A semiconductor device capable of inhibiting a fabricating process from complication while inhibiting the dielectric strength voltage of a insulating film from reduction is obtained. This semiconductor device includes a groove portion, an insulating film formed on a surface of the groove portion, a gate electrode and a source impurity region, wherein upper ends of the gate electrode, which are portions in contact with the insulating film, are each located at a position identical with or deeper than the range of an impurity introduced from a surface of a semiconductor substrate with respect to the insulating film in order to form the source impurity region and above a lower surface of the source impurity region.Type: ApplicationFiled: December 27, 2007Publication date: August 7, 2008Applicant: Sanyo Electric Co.,Ltd.Inventors: Yoshikazu YAMAOKA, Satoru Shimada, Kazunori Fujita, Kazuhiro Sasada
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Publication number: 20060170007Abstract: A solid-state image sensor capable of suppressing color mixture while suppressing increase of load capacitances of transfer gates and a short circuit between two adjacent transfer gates is provided. This solid-state image sensor comprises a plurality of transfer gates and a shielding material line blocking light incident from above a prescribed pixel upon another pixel adjacent to the prescribed pixel. The shielding material line has a downward projecting portion on a region corresponding to at least one transfer gate entering an ON-state in photoreception.Type: ApplicationFiled: January 27, 2006Publication date: August 3, 2006Inventors: Yoshinari Ichihashi, Ryu Shimizu, Kazuhiro Sasada
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Patent number: 6995434Abstract: A semiconductor device capable of suppressing increase of the capacitance while suppressing a thin-line effect of a silicide film is obtained. This semiconductor device comprises a first silicon layer formed on a semiconductor substrate through a gate insulator film with an upper portion and a lower portion larger in width than a central portion for serving as a gate electrode and a first silicide film formed on the first silicon layer for serving as the gate electrode.Type: GrantFiled: September 29, 2003Date of Patent: February 7, 2006Assignee: Sanyo Electric Co., Ltd.Inventors: Ryosuke Usui, Kazuhiro Sasada
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Patent number: 6987294Abstract: A charge-coupled device capable of attaining excellent performance with a single-layer gate electrode structure is obtained. This charge-coupled device, having a single-layer gate electrode structure, comprises a gate insulator film formed on a semiconductor substrate, a plurality of partitions, consisting of an insulator, formed on the gate insulator film, and concave gate electrodes, arranged between adjacent ones of the partitions, having side surfaces formed along side portions of the partitions. Thus, when the partitions are formed with a width of not more than the minimum critical dimension of lithography, the interval between the adjacent gate electrodes is not more than the minimum critical dimension of lithography.Type: GrantFiled: March 13, 2003Date of Patent: January 17, 2006Assignee: Sanyo Electric Co., Ltd.Inventors: Kazuhiro Sasada, Mitsuru Okigawa, Makoto Izumi
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Patent number: 6974717Abstract: A solid state image device capable of attaining high condensability also when integrating an optical lens and a solid state image sensor with each other is provided. This solid state image device comprises an optical lens, a solid state image sensor including a microlens, and a resin layer formed between the optical lens and the microlens of the solid state image sensor. Thus, the solid state image device can refract light incident upon the microlens from the resin layer also when the resin layer is formed between the solid state image sensor and the optical lens.Type: GrantFiled: August 11, 2003Date of Patent: December 13, 2005Assignee: Sanyo Electric Co., Ltd.Inventors: Makoto Izumi, Mitsuru Okigawa, Kazuhiro Sasada, Naoteru Matsubara, Tatsuhiko Koide
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Publication number: 20050200711Abstract: A solid state imaging device includes photoelectric conversion portions for performing photoelectric conversion, and transfer portions for transferring signal charge occurring at the photoelectric conversion portions. Each transfer portion includes a transfer electrode formed of polysilicon film or the like, and an insulating coating film formed of a material such as a silicon nitride film and so forth, which has a higher relative dielectric constant than that of the silicon oxide, for coating the bottom face, the upper face, and both side faces, of the transfer electrode. The silicon nitride film is formed with a film thickness which is greater than 0 nm and smaller than 60 nm, on both sides of the transfer electrode.Type: ApplicationFiled: March 9, 2005Publication date: September 15, 2005Inventors: Ryu Shimizu, Kazuhiro Sasada, Masahiro Oda
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Patent number: 6890831Abstract: A method of fabricating a semiconductor device capable of improving reliability of a gate insulator film is obtained. This method of fabricating a semiconductor device comprises a step of forming a gate insulator film on the main surface of a semiconductor layer by heat treatment, and the step of forming the gate insulator film includes a step of performing the heat treatment in an atmosphere containing oxidizing gas at a temperature exceeding the temperature causing viscous flow of the gate insulator film thereby forming the gate insulator film on the main surface of the semiconductor layer.Type: GrantFiled: June 2, 2003Date of Patent: May 10, 2005Assignee: Sanyo Electric Co., Ltd.Inventors: Mayumi Nakasato, Makoto Izumi, Kazuhiro Sasada, Masahiro Oda, Toru Dan
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Patent number: 6887767Abstract: A method for manufacturing a semiconductor device including forming a buffer film on a semiconductor substrate, forming a element partitioning trench, forming a oxidized film on the surface of the element partitioning trench, and washing the semiconductor substrate with hydrofluoric acid. The washing removes part of the buffer film, and the end of the buffer film is inwardly removed from the top edge of the element partitioning trench by a predetermined distance. The distance and the thickness of the oxidized film are represented by the expression 0?x?(d/2 sin ?), where x represents the distance, and ? represents the angle between a plane parallel to the semiconductor substrate and a side surface of the element partitioning trench.Type: GrantFiled: March 21, 2003Date of Patent: May 3, 2005Assignee: Sanyo Electric Co., Ltd.Inventors: Mayumi Nakasato, Kazuhiro Sasada, Masahiro Oda
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Publication number: 20040262705Abstract: A solid-state image sensor having high condensability is provided. This solid-state image sensor comprises a plurality of photodetection parts formed on a substrate and a plurality of lenses consisting of an inorganic insulator for condensing light on the photodetection parts, while each adjacent pair of lenses are so connected with each other as to include no substantially flat region on the boundary therebetween and the boundary between each adjacent pair of lenses has a prescribed thickness.Type: ApplicationFiled: June 24, 2004Publication date: December 30, 2004Applicant: SANYO ELECTRIC CO., LTD.Inventors: Makoto Izumi, Kazuhiro Sasada, Mitsuru Okigawa
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Publication number: 20040188722Abstract: A solid state image device capable of improving charge transfer efficiency by reducing the interval between adjacent gate electrodes and reducing power consumption by reducing parasitic capacitances while obtaining a signal having small noise is provided. This solid state image device comprises a first gate electrode, formed on a gate insulator film, having a substantially flat upper surface and a second gate electrode formed on the gate insulator film through an insulator film having a thickness smaller than the minimum limit dimension of lithography to be adjacent to the first gate electrode without overlapping the first gate electrode.Type: ApplicationFiled: March 15, 2004Publication date: September 30, 2004Applicant: SANYO ELECTRIC CO., LTD.Inventors: Makoto Izumi, Mitsuru Okigawa, Kazuhiro Sasada
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Publication number: 20040150048Abstract: A semiconductor device capable of suppressing increase of the capacitance while suppressing a thin-line effect of a silicide film is obtained. This semiconductor device comprises a first silicon layer formed on a semiconductor substrate through a gate insulator film with an upper portion and a lower portion larger in width than a central portion for serving as a gate electrode and a first silicide film formed on the first silicon layer for serving as the gate electrode.Type: ApplicationFiled: September 29, 2003Publication date: August 5, 2004Applicant: SANYO ELECTRIC CO., LTD.Inventors: Ryosuke Usui, Kazuhiro Sasada
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Publication number: 20040033640Abstract: A solid state image device capable of attaining high condensability also when integrating an optical lens and a solid state image sensor with each other is provided. This solid state image device comprises an optical lens, a solid state image sensor including a microlens, and a resin layer formed between the optical lens and the microlens of the solid state image sensor. Thus, the solid state image device can refract light incident upon the microlens from the resin layer also when the resin layer is formed between the solid state image sensor and the optical lens.Type: ApplicationFiled: August 11, 2003Publication date: February 19, 2004Applicant: SANYO ELECTRIC CO., LTD.Inventors: Makoto Izumi, Mitsuru Okigawa, Kazuhiro Sasada, Naoteru Matsubara, Tatsuhiko Koide
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Publication number: 20040009635Abstract: A method of fabricating a semiconductor device capable of improving reliability of a gate insulator film is obtained. This method of fabricating a semiconductor device comprises a step of forming a gate insulator film on the main surface of a semiconductor layer by heat treatment, and the step of forming the gate insulator film includes a step of performing the heat treatment in an atmosphere containing oxidizing gas at a temperature exceeding the temperature causing viscous flow of the gate insulator film thereby forming the gate insulator film on the main surface of the semiconductor layer.Type: ApplicationFiled: June 2, 2003Publication date: January 15, 2004Inventors: Mayumi Nakasato, Makoto Izumi, Kazuhiro Sasada, Masahiro Oda, Toru Dan
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Publication number: 20030181021Abstract: A method for manufacturing a semiconductor device including forming a buffer film on a semiconductor substrate, forming a element partitioning trench, forming a oxidized film on the surface of the element partitioning trench, and washing the semiconductor substrate with hydrofluoric acid. The washing removes part of the buffer film, and the end of the buffer film is inwardly removed from the top edge of the element partitioning trench by a predetermined distance. The distance and the thickness of the oxidized film are represented by the expression 0≦x≦(d/2 sin &thgr;), where x represents the distance, and &thgr; represents the angle between a plane parallel to the semiconductor substrate and a side surface of the element partitioning trench.Type: ApplicationFiled: March 21, 2003Publication date: September 25, 2003Applicant: Sanyo Electric Co., Ltd.Inventors: Mayumi Nakasato, Kazuhiro Sasada, Masahiro Oda