Patents by Inventor Kazuhiro Sugita

Kazuhiro Sugita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9793653
    Abstract: A controller unit includes: a base unit having a slot; a module that includes a printed circuit board and that is mounted on the base unit; a pair of male and female connectors, one being included in the base unit and the other being included in the module; and a turning support that allows the module to be turned with respect to the base unit. A pair of a recess and a projection are provided to prevent wrong attachment. The base unit has one of the recess and the projection and the module has the other. The positions of the recess and the projection vary depending on the type of module.
    Type: Grant
    Filed: August 12, 2016
    Date of Patent: October 17, 2017
    Assignee: JTEKT CORPORATION
    Inventors: Kazuhiro Sugita, Yasunori Tsuboi, Koji Hasegawa, Sutemaro Kato
  • Publication number: 20170062988
    Abstract: A controller unit includes: a base unit having a slot; a module that includes a printed circuit board and that is mounted on the base unit; a pair of male and female connectors, one being included in the base unit and the other being included in the module; and a turning support that allows the module to be turned with respect to the base unit. A pair of a recess and a projection are provided to prevent wrong attachment. The base unit has one of the recess and the projection and the module has the other. The positions of the recess and the projection vary depending on the type of module.
    Type: Application
    Filed: August 12, 2016
    Publication date: March 2, 2017
    Applicant: JTEKT CORPORATION
    Inventors: Kazuhiro SUGITA, Yasunori Tsuboi, Koji Hasegawa, Sutemaro Kato
  • Patent number: 9488568
    Abstract: Provided is a polarization analysis apparatus that can quickly measure the polarization properties of a sample. The polarization analysis apparatus includes a light source configured to emit light in a predetermined wavelength region, a polarizer configured to transmit the light emitted from the light source, a spatial phase modulator configured to transmit the light from the sample, an analyzer configured to transmit the light that has passed through the spatial phase modulator, and an imaging spectrometer configured to receive the light that has passed through the analyzer. The spatial phase modulator is formed of a birefringent material, and is configured to have different phase differences at respective positions in a first direction in a plane orthogonal to an optical axis. The imaging spectrometer disperses the received light in a second direction that is different from the first direction in the plane orthogonal to the optical axis.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: November 8, 2016
    Assignee: Otsuka Electronics Co., Ltd.
    Inventors: Kazuhiro Sugita, Yusuke Yamazaki, Haruka Otsuka
  • Publication number: 20150168291
    Abstract: Provided is a polarization analysis apparatus that can quickly measure the polarization properties of a sample. The polarization analysis apparatus includes a light source configured to emit light in a predetermined wavelength region, a polarizer configured to transmit the light emitted from the light source, a spatial phase modulator configured to transmit the light from the sample, an analyzer configured to transmit the light that has passed through the spatial phase modulator, and an imaging spectrometer configured to receive the light that has passed through the analyzer. The spatial phase modulator is formed of a birefringent material, and is configured to have different phase differences at respective positions in a first direction in a plane orthogonal to an optical axis. The imaging spectrometer disperses the received light in a second direction that is different from the first direction in the plane orthogonal to the optical axis.
    Type: Application
    Filed: December 12, 2014
    Publication date: June 18, 2015
    Inventors: Kazuhiro SUGITA, Yusuke YAMAZAKI, Haruka OTSUKA
  • Publication number: 20150106057
    Abstract: Provided are a profile measurement system and a profile measurement method capable of suppressing the influence of vibration with a simple configuration. The profile measurement system includes: a transmissive optical component having a reference plane opposed to a surface of a sample; a light source which irradiates the surface of the sample with light having a predetermined wavelength region through the transmissive optical component; an imaging spectrometer which measures a reflection spectrum for each position on a linear region defined on the surface of the sample; and a calculation unit which calculates a distance between each position on the linear region and the reference plane based on the measured reflection spectrum for each position on the linear region.
    Type: Application
    Filed: October 9, 2014
    Publication date: April 16, 2015
    Inventors: Kazuhiro SUGITA, Tomohiro AKADA
  • Patent number: 5525933
    Abstract: A semiconductor integrated circuit comprises a signal input terminal, a power supply voltage terminal to which a power voltage is applied, a reference voltage terminal to which a ground voltage is applied, a first PMOS transistor having a drain, a gate connected to the signal input terminal, and a source connected to the power supply voltage terminal, a second PMOS transistor having a gate and a drain being mutually connected to each other, and a source connected to the drain of the first transistor, a third PMOS transistor having a gate connected to the drain of the second transistor, a source connected to the power supply potential terminal, and a drain connected to the drain of the first transistor, an NMOS transistor having a gate connected to the power supply voltage terminal, a drain connected to the drain of the second PMOS transistor, and a source connected to the reference voltage terminal, an internal circuit connected to the drain of the NMOS transistor, a first overvoltage absorption element, conn
    Type: Grant
    Filed: February 22, 1995
    Date of Patent: June 11, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeru Matsuki, Kazuhiro Sugita
  • Patent number: 4439146
    Abstract: A heat treatment apparatus is disclosed, which includes a tube device having a tube axis in the horizontal direction for receiving therein an object to be treated so as to treat the same by heat, a holding member for holding thereon a plurality of objects to be treated, first and second supporting devices located at one end outside of the tube device, a first coupling member for coupling the first supporting device with the holding member, a first operating member for moving the holding member in the horizontal direction, a second coupling member attached to the second supporting device for holding a holding portion of the holding member by shaft-rotation, and a second operating member for moving the holding member in the horizontal and vertical directions.
    Type: Grant
    Filed: September 29, 1982
    Date of Patent: March 27, 1984
    Assignee: Sony Corporation
    Inventor: Kazuhiro Sugita
  • Patent number: 4127969
    Abstract: Semiconductor wafers with apertures, that may include crystal orientation surfaces, are made by boring semiconductor ingots and slicing the bored ingots perpendicular to the bore or at an angle thereto. Novel means are provided for handling the wafers without scratching the major surfaces thereof, for supporting the slices to clean them, and for supporting the slices to coat the major surfaces.
    Type: Grant
    Filed: December 11, 1975
    Date of Patent: December 5, 1978
    Assignee: Sony Corporation
    Inventors: Kinji Hoshi, Kazuhiro Sugita
  • Patent number: 4103232
    Abstract: A device to facilitate electrical measurement, including step-and-repeat measurement of minute circuits on a semiconductor wafer by placing the wafer in a specific, angular and cartesian coordinate position with respect to a certain orientation of a disc-like pallet of somewhat larger diameter than the wafer. The apparatus includes a stack of available pallets, each having an indexing portion, arms to engage the pallet in turn and to interfit with the indexing portion, a translational motion device to move the arms and pallet to another specific location to receive the wafer, a controllable section device to hold the wafer and to rotate it about a vertical axis, and a further controlled guide device to move the arms and wafer in specific X and Y directions to a predetermined orientation. The device includes a connection between each pallet and an evacuating apparatus to affix the wafer to the pallet by suction when the wafer is released from the suction device on the orienting structure.
    Type: Grant
    Filed: December 29, 1975
    Date of Patent: July 25, 1978
    Assignee: Sony Corporation
    Inventors: Kazuhiro Sugita, Chiyohide Kon