Patents by Inventor Kazuhiro Yamamuro
Kazuhiro Yamamuro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11938729Abstract: A liquid ejection head includes a base plate and at least two device chips in which ejection ports for ejecting a liquid are formed and which are disposed on the base plate. At least one first reference mark is provided on the base plate. A second reference mark is provided on each of the device chips. At least one space is formed between adjacent device chips. The second reference marks and the first reference mark present in the space are disposed on an array axis along which the device chips are arrayed.Type: GrantFiled: August 3, 2021Date of Patent: March 26, 2024Assignee: Canon Kabushiki KaishaInventors: Kazuhiro Asai, Koji Sasaki, Jun Yamamuro, Shingo Nagata
-
Publication number: 20240092080Abstract: A liquid ejection head includes a base plate and at least two device chips in which ejection ports for ejecting a liquid are formed and which are disposed on the base plate. At least one first reference mark is provided on the base plate. A second reference mark is provided on each of the device chips. At least one space is formed between adjacent device chips. The second reference marks and the first reference mark present in the space are disposed on an array axis along which the device chips are arrayed.Type: ApplicationFiled: November 22, 2023Publication date: March 21, 2024Inventors: Kazuhiro Asai, Koji Sasaki, Jun Yamamuro, Shingo Nagata
-
Publication number: 20240083167Abstract: A liquid ejection head includes a base plate and at least two device chips in which ejection ports for ejecting a liquid are formed and which are disposed on the base plate. At least one first reference mark is provided on the base plate. A second reference mark is provided on each of the device chips. At least one space is formed between adjacent device chips. The second reference marks and the first reference mark present in the space are disposed on an array axis along which the device chips are arrayed.Type: ApplicationFiled: November 22, 2023Publication date: March 14, 2024Inventors: Kazuhiro Asai, Koji Sasaki, Jun Yamamuro, Shingo Nagata
-
Patent number: 11309203Abstract: A wafer stage includes an electrostatic chuck (ESC) plate, an upper supporting plate, a lower supporting plate and a temperature controller. The ESC plate includes a first surface that supports a wafer. The upper supporting plate is bonded to a second surface of the ESC plate opposite to the first surface. The lower supporting plate overlaps the upper supporting plate. The temperature controller is disposed between the upper supporting plate and the lower supporting plate. The ESC plate includes ceramics. The upper supporting plate includes a composite material of aluminum or aluminum alloy and ceramics or carbon. The ESC plate and the upper supporting plate are directly bonded to each other by a room temperature solid bonding process. Thus, the wafer stage has sufficient strength to withstand pressure differences between a vacuum and atmospheric pressure, improved temperature response by minimizing heat capacity, and prevents warpage of the ESC plate.Type: GrantFiled: July 1, 2019Date of Patent: April 19, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Kazuyuki Tomizawa, Masashi Kikuchi, Michio Ishikawa, Takafumi Noguchi, Kazuhiro Yamamuro
-
Publication number: 20200152499Abstract: A wafer stage includes an electrostatic chuck (ESC) plate, an upper supporting plate, a lower supporting plate and a temperature controller. The ESC plate includes a first surface that supports a wafer. The upper supporting plate is bonded to a second surface of the ESC plate opposite to the first surface. The lower supporting plate overlaps the upper supporting plate. The temperature controller is disposed between the upper supporting plate and the lower supporting plate. The ESC plate includes ceramics. The upper supporting plate includes a composite material of aluminum or aluminum alloy and ceramics or carbon. The ESC plate and the upper supporting plate are directly bonded to each other by a room temperature solid bonding process. Thus, the wafer stage has sufficient strength to withstand pressure differences between a vacuum and atmospheric pressure, improved temperature response by minimizing heat capacity, and prevents warpage of the ESC plate.Type: ApplicationFiled: July 1, 2019Publication date: May 14, 2020Inventors: KAZUYUKI TOMIZAWA, MASASHI KIKUCHI, MICHIO ISHIKAWA, TAKAFUMI NOGUCHI, KAZUHIRO YAMAMURO
-
Publication number: 20120094399Abstract: A photovoltaic cell manufacturing method includes: forming a photoelectric converter including a plurality of compartment elements, the compartment elements adjacent to each other being electrically connected; determining the compartment element having a structural defect in the photoelectric converter; narrowing down a region in which the structural defect exists in the compartment element based on a resistance distribution which is obtained by measuring resistances of a plurality of portions between the compartment elements adjacent to each other, image-capturing the inside of the narrowed region in which the structural defect exists by use of an image capturing section, accurately determining a position of the structural defect from the obtained image so that a portion in which the structural defect exists in the compartment element is restricted; and removing the structural defect by irradiating the portion in which the structural defect exists with a laser beam.Type: ApplicationFiled: June 18, 2009Publication date: April 19, 2012Applicant: ULVAC, INC.Inventors: Kazuhiro Yamamuro, Seiichi Sato, Mitsuru Yahagi, Junpei Yuyama, Kyuzo Nakamura
-
Publication number: 20120015453Abstract: A photovoltaic cell manufacturing method includes: forming a photoelectric converter which has a plurality of compartment elements that are separated by a scribing line and in which adjacent compartment elements are electrically connected; detecting a structural defect existing in the compartment element; specifying a position in which the structural defect exists, as distance data indicating a distance between the structural defect and the scribing line that is closest to the structural defect; and removing a region in which the structural defect exists based on the distance data.Type: ApplicationFiled: November 2, 2009Publication date: January 19, 2012Applicant: ULVAC, INC.Inventors: Kazuhiro Yamamuro, Junpei Yuyama, Katsumi Yamane
-
Publication number: 20110171757Abstract: Provided is a method of manufacturing a photovoltatic cell according to the present invention, the photovoltatic cell including a substrate, and a structure in which a first conductive layer, a photoelectric conversion layer and a second conductive layer are superposed on the substrate in this order; the structure is electrically separated by a predetermined size to form a plurality of compartment elements; and the compartment elements adjacent to each other are electrically connected to each other, the method including: a defect region specifying step of specifying a region in which a structural defect exists from the plurality of compartment elements; and a repairing step of irradiating the region or the periphery thereof with a laser beam to remove the structural defect, wherein the repairing step includes a step ? of irradiating the structure with a first laser to remove or separate the region, and a step ? of irradiating an end portion of the structure generated by the removal or separation with a secondType: ApplicationFiled: September 17, 2009Publication date: July 14, 2011Applicant: ULVAC, INC.Inventors: Kazuhiro Yamamuro, Junpei Yuyama, Yibing Song, Hidekatsu Aoyagi
-
Publication number: 20110151591Abstract: The present invention provides a photovoltaic cell manufacturing method, the photovoltaic cell including: a photoelectric converter in which at least a first electrode layer, a semiconductor layer, and a second electrode layer are stacked in layers in this order being formed on a face of a substrate; and a connection portion of the first electrode layer and the second electrode layer, the photoelectric converter having a plurality of compartment elements which are electrically separated by a predetermined size using scribing lines at which the semiconductor layer and the second electrode layer are removed, adjacent compartment elements being electrically connected to each other, the photovoltaic cell manufacturing method comprising: a defect region specifying step in which a region at which the structural defect exists is specified in the photoelectric converter; and a repairing step in which at least three repair lines in which the semiconductor layer and the second electrode layer are removed are formed byType: ApplicationFiled: August 19, 2009Publication date: June 23, 2011Applicant: ULVAC, INC.Inventors: Kazuhiro Yamamuro, Junpei Yuyama, Katsumi Yamane
-
Publication number: 20110135187Abstract: A photovoltaic cell manufacturing method includes: detecting a structural defect existing in compartment elements; obtaining an image by capturing a region including the structural defect and the scribe line with a predetermined definition; specifying first number of pixels on the image, the first number of pixels corresponding to a distance between the scribe lines adjacent to each other or corresponding to a width of the scribe line; referring to an actual value indicating the distance between the scribe lines adjacent to each other or indicating the width of the scribe line, the distance being preliminarily stored, and the width of the scribe line being preliminarily stored; calculating an actual size of one pixel on the image by comparing the first number of pixels with the actual value; specifying second number of pixels on the image, the second number of pixels corresponding to the distance between the structural defect and the scribe line; comparing the second number of pixels with the actual size of oType: ApplicationFiled: August 14, 2009Publication date: June 9, 2011Applicant: ULVAC, INC.Inventors: Kazuhiro Yamamuro, Junpei Yuyama, Katsumi Yamane
-
Publication number: 20110020963Abstract: A method for manufacturing a solar cell, includes: forming a photoelectric converter which includes a plurality of compartment elements, and in which the compartment elements adjacent to each other are electrically connected; specifying a compartment element having a structural defect in the photoelectric converter; restricting a portion in which the structural defect exists in the compartment element by specifying a defect portion based on a resistance distribution that is obtained by measuring resistances of portions between the compartment elements adjacent to each other; and removing the structural defect by supplying a bias voltage to the portion in which the structural defect exists.Type: ApplicationFiled: March 27, 2009Publication date: January 27, 2011Applicant: ULVAC, INC.Inventors: Kazuhiro Yamamuro, Seiichi Sato, Mitsuru Yahagi, Junpei Yuyama, Kyuzo Nakamura
-
Publication number: 20110005571Abstract: A method for manufacturing a solar cell, includes: forming a photoelectric converter which includes a plurality of compartment elements, and in which the compartment elements adjacent to each other are electrically connected; specifying a first compartment element having a structural defect in the photoelectric converter; restricting a portion in which the structural defect exists in the first compartment element by specifying a defect portion based on a resistance distribution that is obtained by measuring resistances of portions between the compartment elements adjacent to each other; and removing or separating off the structural defect by irradiating the first compartment element and a second compartment element with a laser beam so as to intersect a boundary section between the first compartment element including the portion in which the structural defect exists and the second compartment element adjacent to the first compartment element.Type: ApplicationFiled: March 27, 2009Publication date: January 13, 2011Applicant: ULVAC, INC.Inventors: Kazuhiro Yamamuro, Seiichi Sato, Mitsuru Yahagi, Junpei Yuyama, Kyuzo Nakamura