Abstract: A main object of the present disclosure is to provide an active material wherein a volume variation due to charge/discharge is small. The present disclosure achieves the object by providing an active material comprising at least Si and Al, including a silicon clathrate type crystal phase, and a proportion of the Al to a total of the Si and the Al is 0.1 atm % or more and I atm % or less.

Abstract: The power supply device includes a plurality of battery cells each having a square outer shape, a plurality of separators for insulating the adjacent battery cells, and a restraining member that assembles the plurality of battery cells and the plurality of separators. Each of separators has heat insulating properties. Further, each of separators is disposed between the plurality of battery cells. Further, each of separators includes contact portion that comes into contact with adjacent battery cell, and thin portion formed thinner than contact portion.

Abstract: An optical connection structure includes a first silicon photonic chip having a first lateral surface, a second silicon photonic chip having a second lateral surface that faces the first lateral surface, and an optical waveguide disposed astride a gap between the first silicon photonic chip and the second silicon photonic chip. The first silicon photonic chip includes a first silicon substrate and a first silicon waveguide disposed over the first silicon substrate. The second silicon photonic chip includes a second silicon substrate and a second silicon waveguide disposed over the second silicon substrate. The optical waveguide includes a first cladding filling a space between the first lateral surface and the second lateral surface, a core disposed on the first cladding and covering one end of the first silicon waveguide and one end of the second silicon waveguide, and a cladding covering the core.

Abstract: An additive manufacturing device comprises a lower nozzle that blows out inert gas into a chamber in a horizontal direction through a lower opening portion formed in a lower part of a first side wall constituting the chamber, and an upper nozzle that blows out the inert gas into the chamber through an upper opening portion formed in an upper part of the first side wall, wherein the upper nozzle includes a window nozzle that blows out the inert gas along an inner surface of a window portion of a top board constituting the chamber, and an oblique nozzle that blows out the inert gas obliquely downward from the upper portion of the first side wall.

Abstract: An optical connection structure includes a first silicon photonic chip having a first lateral surface, a second silicon photonic chip having a second lateral surface that faces the first lateral surface, and an optical waveguide disposed astride a gap between the first silicon photonic chip and the second silicon photonic chip. The first silicon photonic chip includes a first silicon substrate and a first silicon waveguide disposed over the first silicon substrate. The second silicon photonic chip includes a second silicon substrate and a second silicon waveguide disposed over the second silicon substrate. The optical waveguide includes a first cladding filling a space between the first lateral surface and the second lateral surface, a core disposed on the first cladding and covering one end of the first silicon waveguide and one end of the second silicon waveguide, and a cladding covering the core.

Abstract: Memory devices are disclosed. A memory device may include a bonding pad region for coupling command-and-address (CA) input signals and a memory cell region for storing information in memory cells. The memory device may also include a centralized CA interface region including input circuits coupled to the CA input signals. At least two of the input circuits are configured in pairs. Each pair includes a swap circuit configured to select one of a first CA output and a second CA output for a first internal CA signal and select the other of the first CA output and the second CA output for a second internal CA signal responsive to a control signal. Memory systems and systems are also disclosed.

Abstract: Disclosed herein is an apparatus that includes: a semiconductor substrate including first and second source regions coupled to a first power supply line and first and second drain regions coupled to a second power supply line, the first drain region being arranged between the first and second source regions, the second source region being arranged between the first and second drain regions; and gate electrodes including a first gate electrode arranged between the first source region and the first drain region, a second gate electrode arranged between the first drain region and the second source region, and a third gate electrode arranged between the second source region and the second drain region. The first and third gate electrodes are supplied with a first control signal. The second gate electrode is supplied with a second control signal.

Abstract: A biological information measurement device includes a sensor unit and a controller. The sensor unit includes an N number of measurement portions. N is a natural number of 3 or greater. The controller acquires an N number of output signals from the measurement portions in a given acquisition order. The controller outputs a shutdown signal having a first level to the measurement portions in accordance with the acquisition order of the output signals. The controller outputs the shutdown signal having a second level to the measurement portions in response to acquisition of a corresponding output signal. When the controller outputs the first-level shutdown signal to the measurement portion having an ordinal number of i in the acquisition order, where i is a natural number of 1 or greater, the controller also outputs the first-level shutdown signal to the measurement portion having an ordinal number of (i+1) in the acquisition order.

Abstract: A myoelectric sensor array includes a plurality of myoelectric sensors, and a plurality of wiring members each electrically connecting corresponding two adjacent myoelectric sensors among the plurality of myoelectric sensors, wherein each of the plurality of the myoelectric sensors includes a substrate, a pair of myoelectric electrodes provided on the substrate, and a signal processing circuit electrically connected to the pair of myoelectric electrodes and at least one of the wiring members.

Abstract: An object is to change reactor core thermal output. A nuclear reactor includes an annular fuel layer and a heat conductive layer stacked on the fuel layer and extending around a periphery of the fuel layer.

Abstract: An additive manufacturing nozzles includes a header (41) extending in a width direction of the chamber and which is configured to be supplied with inert gas from the outside, and a nozzle body (43) connecting with the header (41) in the width direction and is configured to horizontally blow out the inert gas, which is supplied from the header, to a molding area. The nozzle body has a honeycomb part (52) which defines an inside of the nozzle body into flow channels through which the inert gas flows, a blowout part (55) disposed downstream of the honeycomb part and which is connected with the honeycomb part in the width direction. The inert gas passed through the plurality of flow channels is led from the honeycomb part to the blowout part, and a porous part (54), which has openings, is disposed between the honeycomb part and the blowout part.

Abstract: A circuit board includes a support member having a first major surface and a second major surface opposite the first major surface, and an elastic interconnect substrate having a first surface and a second surface opposite the first surface, at least part of the second surface being fixed to the first major surface and the second major surface of the support member, wherein the first surface of the interconnect substrate includes a circuit region where an electronic component is mounted and at least one electrode region where at least one external electrode is arranged, wherein the circuit region is disposed indirectly on the first major surface of the support member, and wherein the interconnect substrate is bent around the support member, and at least part of the electrode region is disposed indirectly on the second major surface of the support member.

Abstract: An object is to efficiently take heat out of a reactor core while retaining fission products. Included are fuel part provided with a covering part on a surface of a nuclear fuel and a heat conductive part.

Abstract: Devices are disclosed. A device may include a command and address (CA) interface including a first pair of input circuits arranged in a first direction. The CA interface further including at least one additional pair of input circuits arranged in a second direction relative to the first pair of input circuits. Associated systems are also disclosed.

Abstract: An image processing system includes a joining processing unit configured to perform a joining process to join input images captured by an image capturing device and generate an output image the image capturing device being reflected in each of the input images; and an acceptance unit configured to receive selection of one of a plurality of modes for the joining process. The plurality of modes has a first mode to generate an output image in which at least a part of the image capturing device is reflected, through the joining process; and a second mode to, through the joining process, generate an output image whose area where the image capturing device is reflected is smaller than an area where the image capturing device is reflected in the output image in the first mode or generate an output image in which the image capturing device is not reflected.

Abstract: Disclosed herein is an apparatus that includes: a semiconductor substrate including first and second source regions coupled to a first power supply line and first and second drain regions coupled to a second power supply line, the first drain region being arranged between the first and second source regions, the second source region being arranged between the first and second drain regions; and gate electrodes including a first gate electrode arranged between the first source region and the first drain region, a second gate electrode arranged between the first drain region and the second source region, and a third gate electrode arranged between the second source region and the second drain region. The first and third gate electrodes are supplied with a first control signal. The second gate electrode is supplied with a second control signal.

Abstract: Provided is a nuclear reactor unit that can reduce a temperature increase in a reactor core at the occurrence of an abnormality with a simple structure. Included are a reactor core having radioactive fuel and causing the radioactive fuel to cause a nuclear reaction and a nuclear reactor vessel housing the reactor core and hermetically sealing the reactor core. The nuclear reactor vessel includes an inner shroud covering the entire periphery of the reactor core and an outer shroud covering the entire periphery of the inner shroud. A first space formed by the outer shroud and the inner shroud is in a vacuum condition. The inner shroud includes a main body and a communicating part placed in part of the main body and communicating the first space to a second space, which is a space inside the inner shroud, when the reactor core reaches a threshold temperature or higher.

Abstract: An electric wire with a terminal described herein includes a shielded electric wire 11 and an inner conductive member 20. The shielded electric wire 11 includes a covered wire 12 including a core wire 13 through which a signal for communication is transmitted and an insulation cover 14 that has insulation property and covers the core wire 13, a shielding portion 15 having electric conductive property and covering an outer periphery of the covered wire 12, and a sheath 16 covering an outer periphery of the shielding portion 15. The inner conductive member 20 is connected to the covered wire 12. The covered wire 12 has an end portion close to the inner conductive member 20 and the end portion is an uncovered portion 17 that is not covered with the sheath 16 and the shielding portion 15. The uncovered portion 17 is covered with an impedance adjustment member 80 that has electric conductive property.

Abstract: A semiconductor apparatus includes an interconnect substrate having a first major surface, a first semiconductor device having a second major surface and mounted to the interconnect substrate, the second major surface opposing the first major surface, a second semiconductor device having a third major surface and a fourth major surface and mounted to the first semiconductor device, the third major surface opposing the first major surface, the fourth major surface opposing the second major surface, a through hole formed through the interconnect substrate at a position overlapping the second semiconductor device in a plan view taken in a thickness direction of the interconnect substrate, and a heatsink member disposed in contact with part of the third major surface, at least a part of the first major surface, and at least a part of a sidewall surface of the through hole.

Abstract: In an embodiment of this invention, in a learning phase, a state estimation device acquires activity state data and biometric data at that time from user terminals of a plurality of users, generates a regression formula representing the relationship between the biometric data and the activity state data using a regression analysis method on the basis of these pieces of measurement data, and calculates a difference between the coefficients of the regression formula of all users and each user to generate a coefficient correction regression formula representing a relationship between the difference of the coefficient and an average value of the biometric data.