Abstract: A reception device that receives a modulation signal being a result of digital modulation of a carrier is disclosed. The device includes: a demodulation section that demodulates the modulation signal into a demodulation signal including an I component and a Q component; a numerically controlled oscillation section that generates a signal of predetermined phase; a phase error detection section that detects a phase error between a phase of a symbol of the demodulation signal and the predetermined phase of the signal generated by the numerically controlled oscillation section; a phase rotation section that rotates the phase of the symbol of the demodulation signal in accordance with the phase error; a loop filter that filters the phase error, and controls the numerically controlled oscillation section; and a gain control section that controls a gain of the loop filter based on a modulation technique of the modulation signal.

Abstract: Disclosed herein is a data reader including: an image acquisition section configured to acquire an image having color cells arranged in a two-dimensional space, each of the color cells being made up of a graphic of a given color density in a predetermined form and size; a spatial deinterleaving section configured to perform spatial deinterleaving adapted to sort the color cells arranged in the two-dimensional space in a spatially distributed manner in the acquired image; and a color decoding section configured to decode data coded in association with colors of the color cells and densities of the colors by analyzing the image with the sorted color cells as color data associated with coordinate positions in the two-dimensional space.

Abstract: Disclosed herein is a signal processing device including: a correlation signal output unit configured to, about a received signal transmitted from another device, calculate a correlation value between the received signal and a pattern of a waveform of a known signal and output the calculated correlation value as a correlation signal in a time corresponding to one symbol; a known signal determiner configured to determine, based on the correlation signal, whether or not the received signal is modulated by the known signal in a first interval defined when the time corresponding to one symbol is divided into a plurality of intervals; and an identifier configured to identify a series of the symbol based on a result of the determination.

Abstract: Disclosed herein is a signal processing apparatus including a plurality of frame head detection sections configured to determine whether a frame head complying with any one of a plurality of different communication methods is detected by comparing the waveform of a signal sent from an external apparatus with a plurality of predetermined different symbol patterns; a communication method selection section configured to select the communication method for communicating with the external apparatus based on results of the determination by the frame head detection sections and on the priority of each of the plurality of communication methods; and a priority changing section configured such that if a second communication method different from an initially selected first communication method is selected anew, then the priority changing section changes the priority of each of the plurality of communication methods based on the newly selected second communication method.

Abstract: Disclosed herein is a demodulation apparatus including: an operation determination block configured to determine whether the demodulation apparatus operates as part of either a first device or a second device with which the demodulation apparatus communicates, the first device being configured to ASK-modulate and transmit data, the second device being configured to load-modulate and transmit data; and first and second demodulation control blocks.

Abstract: The present invention relates to a waveform equalizer and a method for controlling the same, as well as a receiving apparatus and a method for controlling the same whereby better receiving characteristics are provided than before. In a filter 28, registers 911 through 915 delay an input DT1; multipliers 920 through 925 multiply outputs from the registers by filter coefficients C20 through C25 respectively; and adders 931 through 935 add up outputs from the multipliers to acquire DT2. A selector 81 either outputs a timing signal at intervals of a symbol period of DT1 to drive the filter 82 as a symbol rate equalizer, or outputs the timing signal at intervals of half the symbol period to operate the filter 82 as a fractionally spaced equalizer. The present invention may be applied to waveform equalizers performing waveform equalization of the input signal.

Abstract: Disclosed herein is a receiving apparatus including: first to third position determination sections configured to determine the start position of an FFT interval which serves as a signal interval targeted for FFT by an FFT section; a selection section configured to select one of those start positions of the FFT interval which are determined by the first through the third position determination section; and the FFT section configured to perform FFT on the OFDM time domain signal by regarding the start position selected by the selection section as the start position of the FFT interval in order to generate the first OFDM frequency domain signal.

Abstract: An OFDM receiver (1) is provided which includes a clock-frequency error calculation circuit (41) to calculate a difference in clock frequency between a clock for a received signal and an operation clock used in the receiver (1), and a guard correlation/peak detection circuit (12) to determine an autocorrelation of a guard interval and detect a peak timing of the correlation signal. The guard correlation/peak detection circuit (12) incorporates a free-running counter, and outputs a count of the free-running counter at the peak timing to the clock-frequency error calculation circuit (41). The clock-frequency error calculation circuit (41) uses a plurality of time-change rate detection circuits provided at different time intervals to calculate a time-change rate of an input count. The clock-frequency error calculation circuit (41) plots the time-change rates to generate a histogram and calculates a clock-frequency error from the histogram.

Abstract: A reception device that receives a modulation signal being a result of digital modulation of a carrier is disclosed. The device includes: a demodulation section that demodulates the modulation signal into a demodulation signal including an I component and a Q component; a numerically controlled oscillation section that generates a signal of predetermined phase; a phase error detection section that detects a phase error between a phase of a symbol of the demodulation signal and the predetermined phase of the signal generated by the numerically controlled oscillation section; a phase rotation section that rotates the phase of the symbol of the demodulation signal in accordance with the phase error; a loop filter that filters the phase error, and controls the numerically controlled oscillation section; and a gain control section that controls a gain of the loop filter based on a modulation technique of the modulation signal.

Abstract: An OFDM demodulation (1) is provided which includes a guard correlation/peak time detection circuit (12) to generate a peak timing Np of a guard interval correlation value, and a timing synchronization circuit (13) to estimate a symbol-boundary time Nx from the peak timing Np. The timing synchronization circuit (13) calculates the symbol-boundary time Nx by filtering the peak time Np by a DLL (delay locked loop) filter (43). Further, the DLL filter (43) includes a limiter (52) to limit the range of phase-error component and an asymmetric gain circuit (53) to change the magnitude of the gain correspondingly to the polarity of the phase error to prevent the timing from being pulled out due to a fading or multipath.

Abstract: An OFDM receiver (1) is provided which includes a clock-frequency error calculation circuit (41) to calculate a difference in clock frequency between a clock for a received signal and an operation clock used in the receiver (1), and a guard correlation/peak detection circuit (12) to determine an autocorrelation of a guard interval and detect a peak timing of the correlation signal. The guard correlation/peak detection circuit (12) incorporates a free-running counter, and outputs a count of the free-running counter at the peak timing to the clock-frequency error calculation circuit (41). The clock-frequency error calculation circuit (41) uses a plurality of time-change rate detection circuits provided at different time intervals to calculate a time-change rate of an input count. The clock-frequency error calculation circuit (41) plots the time-change rates to generate a histogram and calculates a clock-frequency error from the histogram.