Patents by Inventor Kazuhisa IIZUKA

Kazuhisa IIZUKA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090198973
    Abstract: A processing circuit according to the present invention includes a plurality of logic circuits (designated as L11, . . . , and L44) formed by arranging in arrays and is configured to input an output from a logic circuit to the logic circuit located on the following row. Each of the plurality of logic circuits includes an operation circuit (ALU) configured to perform an operation on inputted data; and a selecting unit (MUX) configured to select and output any one of an operation output from the operation circuit or an operation output from the logic circuit located on the preceding row.
    Type: Application
    Filed: January 28, 2009
    Publication date: August 6, 2009
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Kazuhisa IIZUKA, Makoto OZONE