Patents by Inventor Kazuhisa Kogure

Kazuhisa Kogure has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6850584
    Abstract: A clock regeneration circuit having a PLL circuit which includes a voltage control oscillator; a clock extraction circuit which includes a band passing filter and a harmonic component of a dividing signal of the oscillation frequency signal; a frequency detector; a filter; a bit rate detection circuit; and a frequency selection circuit outputting an oscillation frequency of the voltage control oscillator of the PLL circuit or a frequency signal obtained by dividing the oscillation frequency in response to the bit rate detected by the bit rate detection circuit, as a regeneration clock circuit.
    Type: Grant
    Filed: December 6, 2000
    Date of Patent: February 1, 2005
    Assignee: Fujitsu Limited
    Inventors: Kazuhisa Kogure, Hiroshi Yamada, Atsushi Suda
  • Publication number: 20010019441
    Abstract: Disclosed is a clock regeneration circuit comprising a PLL circuit which includes a voltage control oscillator, for synchronizing an oscillation frequency signal of the voltage control oscillator with a phase of a reception signal; a clock extraction circuit which includes a band passing filter having a passing band width which concurrently extracts a basic waves component of the oscillation frequency signal of the voltage control oscillator and a harmonic component of a dividing signal of the oscillation frequency signal, for extracting a clock component of the reception signal; a frequency detector for detecting a different in frequencies between an output of the clock extraction circuit and an oscillation frequency of the voltage control oscillator; a filter for controlling the oscillation frequency of the voltage control oscillator of the PLL circuit at a detection output of the frequency detector; a bit rate detection circuit for detecting a bit rate of the reception signal; and a frequency selection cir
    Type: Application
    Filed: December 6, 2000
    Publication date: September 6, 2001
    Inventors: Kazuhisa Kogure, Hiroshi Yamada, Atsushi Suda
  • Patent number: 5636048
    Abstract: In an equalizing amplifier that equalizes an electric signal obtained from a light signal received via an optical transmission path, an AGC circuit generates first and second signals from the electric signal by referring to a threshold voltage. The first and second signals are complementary signals. An offset compensation circuit generates a first difference signal based on a difference between the first and second signals, compares the first difference signal with a first reference signal, and outputs, as the threshold voltage, a resultant error signal to the AGC circuit. The threshold voltage is varied so that it is located in the center of an amplitude of the electric signal whereby an offset of the AGC circuit can be compensated for.
    Type: Grant
    Filed: March 16, 1995
    Date of Patent: June 3, 1997
    Assignee: Fujitsu Limited
    Inventors: Kazuhisa Kogure, Hirokazu Osada, Yasuhiro Tanaka, Hiroo Kitasagami, Makoto Miyoshi, Kakuji Inoue, Takayoshi Ikegami, Kenichi Kobayashi, Shinichiro Sano, Setsuo Misaizu, Masahiko Yamashita, Tatsuya Nishimura