Abstract: The present invention provides a method for purifying organic chemical-containing contaminated substances by which various organic chemicals (contaminants) can be readily and sufficiently decomposed in a short time, the method comprising the steps of adding a metal salt and a transition metal ionic compound to water or soil that contains organic chemicals, decomposing the organic chemicals by irradiating with light, and separating/collecting the detoxified organic chemicals.

Abstract: The present invention provides a method for purifying organic chemical-containing contaminated substances by which various organic chemicals (contaminants) can be readily and sufficiently decomposed in a short time, the method comprising the steps of adding a metal salt and a transition metal ionic compound to water or soil that contains organic chemicals, decomposing the organic chemicals by irradiating with light, and separating/collecting the detoxified organic chemicals.

Abstract: The present invention provides a method for purifying organic chemical-containing contaminated substances by which various organic chemicals (contaminants) can be readily and sufficiently decomposed in a short time, the method comprising the steps of adding a metal salt and a transition metal ionic compound to water or soil that contains organic chemicals, decomposing the organic chemicals by irradiating with light, and separating/collecting the detoxified organic chemicals.

Abstract: The present invention provides a sulfonate compound including a structure represented by a general formula (I) below. In the formula (I), an atomic group A-O is an atomic group that forms a fluorescent compound upon cleavage of a covalent bond with a sulfonyl group. There may be one or plural atomic groups B—SO3— bound to an atomic group A. B is a ring substituted by one or plural electron-withdrawing groups. The electron-withdrawing group includes at least one selected from the group consisting of halogens, a carboxyl group, a carbamoyl group, a straight or branched alkylcarbamoyl group, a straight or branched alkanoyl group, a straight or branched alkoxycarbonyl group, a straight or branched alkyl halide group, and —NR3+ group (the three Rs each denote a hydrogen atom or a straight or branched alkyl group and may be the same or different). When there are plural Bs, the Bs may be the same or different.

Abstract: The present invention provides a sulfonate compound including a structure represented by a general formula (I) below. In the formula (I), an atomic group A-O is an atomic group that forms a fluorescent compound upon cleavage of a covalent bond with a sulfonyl group. There may be one or plural atomic groups B—SO3— bound to an atomic group A. B is a ring substituted by one or plural electron-withdrawing groups. The electron-withdrawing group includes at least one selected from the group consisting of halogens, a carboxyl group, a carbamoyl group, a straight or branched alkylcarbamoyl group, a straight or branched alkanoyl group, a straight or branched alkoxycarbonyl group, a straight or branched alkyl halide group, and —NR3+ group (the three Rs each denote a hydrogen atom or a straight or branched alkyl group and may be the same or different). When there are plural Bs, the Bs may be the same or different.

Abstract: A semiconductor integrated circuit device including a driver circuit, a first long-distance wiring connected to the driver circuit, and a plurality of gate circuits connected over the entire length of the first long-distance wiring, so that an output signal of the driver circuit is received by the plurality of gate circuits via the first long-distance wiring, wherein a node arranged in the vicinity of an input terminal of the gate circuit connected to an input terminal of the driver circuit and an end of the first long-distance wiring is connected by a second long-distance wiring and a speed-increasing circuit.

Abstract: A semiconductor integrated circuit device including a driver circuit, a first long-distance wiring connected to the driver circuit, and a plurality of gate circuits connected over the entire length of the first long-distance wiring, so that an output signal of the driver circuit is received by the plurality of gate circuits via the first long-distance wiring, wherein a node arranged in the vicinity of an input terminal of the gate circuit connected to an input terminal of the driver circuit and an end of the first long-distance wiring is connected by a second long-distance wiring and a speed-increasing circuit.

Abstract: An input-output circuit cell includes an input-output circuit formed on a semiconductor chip and having a signal terminal and an electric source terminal and a plurality of input-output bumps connected to the signal and electric-source terminals of the input-output circuit through wirings respectively, the plurality of input-output bumps being made to correspond to the input-output circuit and arranged at a center in a plane of projection of the input-output circuit. Accordingly, the input-output circuit is disposed in an arbitrary position on the semiconductor chip.

Abstract: An input-output circuit cell includes an input-output circuit formed on a semiconductor chip and having a signal terminal and an electric source terminal and a plurality of input-output bumps connected to the signal and electric-source terminals of the input-output circuit through wirings respectively, the plurality of input-output bumps being made to correspond to the input-output circuit and arranged at a center in a plane of projection of the input-output circuit. Accordingly, the input-output circuit is disposed in an arbitrary position on the semiconductor chip.

Abstract: An input-output circuit cell includes an input-output circuit formed on a semiconductor chip and having a signal terminal and an electric source terminal and a plurality of input-output bumps connected to the signal and electric-source terminals of the input-output circuit through wirings respectively, the plurality of input-output bumps being made to correspond to the input-output circuit and arranged at a center in a plane of projection of the input-output circuit. Accordingly, the input-output circuit is disposed in an arbitrary position on the semiconductor chip.

Abstract: An input-output circuit cell includes an input-output circuit formed on a semiconductor chip and having a signal terminal and an electric source terminal and a plurality of input-output bumps connected to the signal and electric-source terminals of the input-output circuit through wirings respectively, the plurality of input-output bumps being made to correspond to the input-output circuit and arranged at a center in a plane of projection of the input-output circuit. Accordingly, the input-output circuit is disposed in an arbitrary position on the semiconductor chip.

Abstract: A semiconductor integrated circuit device such as a memory device with logic function comprises a plurality of RAM macrocells and gate arrays. The RAM macrocells are constituted by bipolar CMOS RAMs having a total memory capacity of at least 100 kilobits, and the gate arrays contain at least 4000 gates. The logic circuits in the memory device with logic function or the like are constructed by selectively combining CMOS, bipolar CMOS or ECL gate circuits depending on the output load capacity, transmission characteristic requirement, power dissipation and required layout area. The level of signals at various circuits is set to the ECL level or MOS level depending on the local circuit configuration and other factors. The memory device further incorporates sequence control circuits required to be installed downstream of buffer storages of computers.

Abstract: Herein disclosed is a logic circuit which has an input bipolar transistor for receiving an input signal at its base; variable impedance circuit having at least a first P-channel MOSFET connected between a first supply voltage and the collector of the input bipolar transistor; a second N-channel MOSFET connected between the emitter of the input bipolar transistor and a second supply voltage; an output bipolar transistor connected between the first supply voltage and the output terminal of the circuit for receiving the collector potential of the input bipolar transistor at its base; and a third, pull-down MOSFET connected between the output terminal and the second or third supply voltage.

Abstract: A semiconductor integrated circuit device such as a memory device with logic function comprises a plurality of RAM macrocells and gate arrays. The RAM macrocells are constituted by bipolar CMOS RAMs having a total memory capacity of at least 100 kilobits, and the gate arrays contain at least 4000 gates. The logic circuits in the memory device with logic function or the like are constructed by selectively combining CMOS, bipolar CMOS or ECL gate circuits depending on the output load capacity, transmission characteristic requirement, power dissipation and required layout area. The level of signals at various circuits is set to the ECL level or MOS level depending on the local circuit configuration and other factors. The memory device further incorporates sequence control circuits required to be installed downstream of buffer storages of computers.

Abstract: A semiconductor integrated circuit is provided having first and second level generate circuits producing different levels and first and second emitter follower circuits respectively connected thereto. A level generated by one of the first and second level generate circuits is selectively supplied to either one of the first and second emitter follower circuits. This enables the first and second emitter follower circuits to supply the respective circuits formed in a semiconductor substrate with stable reference voltages.

Abstract: A semiconductor integrated circuit device includes a pulse width expander circuit for expanding the pulse width of a pulse signal of the ECL (emitter coupled logic) level that has a very narrow pulse width, a level conversion circuit for converting the output signal of the ECL level of the pulse width expander circuit into a CMOS (complementary metal oxide semiconductor) level, and an internal circuit that is so connected as to receive the output signal of the level conversion circuit. In other words, the pulse signal having a narrow pulse width is expanded to have a pulse width which is sufficient for the level conversion circuit prior to performing the level conversion operation. Therefore, the level of the pulse signals having narrow pulse widths is stably converted.

Abstract: A semiconductor integrated circuit is provided having first and second level generate circuits producing different levels and first and second emitter follower circuits respectively connected thereto. A level generated by one of the first and second level generate circuits is selectively supplied to either one of the first and second emitter follower circuits. This enables the first and second emitter follower circuits to supply the respective circuits formed in a semiconductor substrate with stable reference voltages.

Abstract: Hydrogen is biologically, effectively produced by an alga in an alternating light/dark cycle which comprises alternating a step for cultivating the alga in water under aerobic conditions in the presence of light to accumulate photosynthetic products in the alga and a step for cultivating the alga in water under microaerobic conditions in the dark to decompose accumulated material by photosynthesis to evolve hydrogen.

Abstract: An artificial medical material with an anticoagulative activity which comprises a carrier material, and heparin and antithrombin III co-immobilized thereon by a per se conventional procedure.