Abstract: A nonvolatile semiconductor memory device comprises a plurality of sectors each having a plurality of memory cell arrays, a controller which responds to an address signal and a control signal to activate at least one of the sectors; and a plurality of data comparing circuits provided in the memory cell arrays, respectively, the data comparing circuits each which latches a write data to be written the respective memory cell arrays and compares the write data latched and a data read out from the respective memory cell arrays to produce a comparison result. The controller activates all of the sectors when the control signal has a first logic level regardless of levels of the address signal so that write data is written into the memory cell arrays of the sectors activated. The controller activates the sectors in sequence in response to changing levels of the address signal when the control signal has a second logic level to output the comparison results from the data comparing circuits in sequence.

Abstract: Disclosed is a buprenorphine percutaneous absorption preparation comprising a backing having formed on one side thereof a pressure-sensitive adhesive layer containing at least one of buprenorphine and a salt thereof, wherein the pressure-sensitive adhesive layer contains an acrylic copolymer and crosslinked acrylic copolymer particles. The buprenorphine percutaneous absorption preparation has excellent pressure-sensitive adhesive characteristics and exerts excellent percutaneous absorption property.

Abstract: A plurality of memory cells are arranged in lattice arrangement to form a memory cell array. Each of the memory cells is provided with a source. Data in the memory cell can be electrically written and erased. Sources of all the memory cells are connected in common. Also, a source voltage control circuit having two or more kinds of load characteristics is connected to the sources connected in common. According to a load characteristics selected from a plurality of load characteristics, source voltage of the memory cell is controlled.

Abstract: The present invention provides a percutaneous absorption preparation which has excellent pressure-sensitive adhesive characteristics and exerts excellent percutaneous absorption property. A crosslinking agent is added to a solution of an acrylic copolymer prepared by copolymerizing a (meth)acrylic acid alkyl ester with a functional monomer, and the acrylic copolymer is partially crosslinked. A composition containing the crosslinked acrylic copolymer is pulverized to prepare a pressure-sensitive adhesive solution comprised of the acrylic copolymer containing crosslinked acrylic copolymer particles. Thereafter, a drug for percutaneous absorption use, a percutaneous penetration enhancer are added to the pressure-sensitive adhesive solution, thereby producing the percutaneous absorption preparation.

Abstract: A percutaneous absorption preparation which is excellent in the skin penetration of a non-narcotic analgesic buprenorphine and can sustain a high blood level in a stable state over a long period of time is provided. The percutaneous absorption preparation for administrating buprenorphine hydrochloride and/or buprenorphine, which comprises a support having on one surface thereof a plaster layer containing a pressure-sensitive adhesive, buprenorphine hydrochloride and/or buprenorphine, and a penetration enhancer, wherein the penetration enhancer comprises a combination of a monoglyceride of a fatty acid having 6 to 8 carbon atoms and isopropyl myristate, and the plaster layer contains at least 10% by weight of a monoglyceride off fatty acid having 6 to 8 carbon atoms and at least 5% by weight off isopropyl myristate, with the proviso that the content of the whole penetration enhancer ranges from 25 to 50% by weight.

Abstract: An electrically erasable and programmable read only memory device concurrently erases data bits stored in the memory cells by evacuating electrons from the floating gate electrodes to a source line, and an erase and verify system incorporated in the electrically erasable and programmable read only memory device continues the erasing pulse without a verify until most of the electrons are evacuated so as to quickly complete the erasing operation.

Abstract: A non-volatile semiconductor memory comprises a plurality of memory cells each composed of a floating gate field effect transistor, and an erasing circuit connected to a common source line connected to a source electrode of each of the memory cells. The erasing circuit includes first and second field effect transistors each of which has a source connected to an erasing voltage and a drain connected to the common source line. The first field effect transistor responds to a given erase signal to apply the erasing voltage to the common source line for the purpose of erasing date stored in the memory cells. The erasing circuit includes a control circuit for turning on the second field effect transistor when a voltage on the common source line becomes higher than a reference voltage, so that the erasing voltage is supplied through the first and second field effect transistor to the common source line.

Abstract: An electrically erasable and programmable read only memory device enters an automatic erasing mode of operation, and repeats short erasing operation followed by confirmation of proper erased state in the automatic erasing mode, wherein the memory cell array is inspected to see whether or not each memory cell not only enters the erased state but also remains in enhancement mode so that the memory cell array is exactly programmed in a programming mode of operation.

Abstract: A flash memory is operable using a single power supply voltage. In this flash memory, an internal booster circuit boosts the supply voltage to generate a write voltage higher than the supply voltage. A row decoder is connected to word lines, which are connected to memory cells. Upon reception of an address signal, the row decoder selects a word line specified by this address signal. A row-line clamp circuit, which is connected to the internal booster circuit and the word lines, supplies the write voltage to a word line selected at the time of data writing, and drops the write voltage and supplies it to the selected word line at the time of write verify.

Abstract: A flash memory of the present invention has a comparator for inspecting whether or not data is erased from each memory cell. If data written in each of all the memory cells has been erased completely, erasing operation to the memory cell block is prohibitted.

Abstract: An electrically erasable and programmable read only memory device executes a verifying operation on a selected memory cell after a programming operation, and a predetermined voltage higher than a read-out voltage is applied to the control gate electrode to see whether or not the threshold level of the selected memory cell is high enough to remain in the programmed state, wherein the predetermined voltage is internally produced from an external power voltage level so that an electronic system is not expected to be equipped with a source of predetermined voltage, thereby making the electronic system simple.

Abstract: When an electrically erasable and program read only memory device enters an erasing mode of operation, electrons are evacuated from floating gate electrodes of the floating gate type field effect transistors serving as memory cells, and the evacuation is continued over a time period instructed from an internal memory circuit so that the memory cells are prevented from depletion mode due to excess evacuation as well as from non-erased state due to insufficient evacuation.

Abstract: An anti-inflammatory analgesic adhesive preparation is disclosed, comprising a flexible support having laminated thereon a pressure-sensitive adhesive material layer which contains a non-steroidal anti-inflammatory analgesic agent having salt form and an organic acid. This adhesive preparation has excellent percutaneous absorption properties.