Patents by Inventor Kazuhisa Raita
Kazuhisa Raita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9007385Abstract: An image processing apparatus has a main processing section that outputs an image processing command signal; an anomaly detection section that detects an anomaly in the main processing section, outputting an anomaly information output signal; an image processing section that outputs a first image signal when the main processing section is in normal operation and that outputs a second image signal when an anomaly has occurred in the main processing section; and an image selection section that selects either the first image signal or the second image signal on the basis of the anomaly information output section.Type: GrantFiled: February 4, 2014Date of Patent: April 14, 2015Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Kazuhisa Raita, Takeshi Endo, Kiyoshi Notsu, Satoshi Fujii, Hiroto Koshimizu, Tomohiro Watanabe
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Publication number: 20140152679Abstract: An image processing apparatus has a main processing section that outputs an image processing command signal; an anomaly detection section that detects an anomaly in the main processing section, outputting an anomaly information output signal; an image processing section that outputs a first image signal when the main processing section is in normal operation and that outputs a second image signal when an anomaly has occurred in the main processing section; and an image selection section that selects either the first image signal or the second image signal on the basis of the anomaly information output section.Type: ApplicationFiled: February 4, 2014Publication date: June 5, 2014Applicant: PANASONIC CORPORATIONInventors: Kazuhisa RAITA, Takeshi ENDO, Kiyoshi NOTSU, Satoshi FUJII, Hiroto KOSHIMIZU, Tomohiro WATANABE
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Patent number: 8558624Abstract: A semiconductor integrated circuit capable of reliably detecting oscillation stop of a vibrator-type oscillation circuit and reliably restarting the oscillation circuit when oscillation stop is detected is provided. The semiconductor integrated circuit includes one or more main oscillation circuits configured to generate a main clock signal by a vibrator, a ring oscillator configured to always operate independently of the main oscillation circuit, a main clock detection circuit configured to monitor the main clock signal on the basis of an output clock signal of the ring oscillator and to determine an operation state of the main oscillation circuit, and an switch circuit configured to switch a combination of elements making up the main oscillation circuit in response to a detection result of the main clock detection circuit.Type: GrantFiled: January 7, 2011Date of Patent: October 15, 2013Assignee: Panasonic CorporationInventor: Kazuhisa Raita
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Publication number: 20130088596Abstract: An image comparison section provided in a monitoring system compares current image data with past image data acquired in at least one preceding cycle when a vehicle is determined to be in motion on the basis of an output signal input from a motion sensing section. On the basis of a comparison result, the image comparison section determines whether or not a camera or an image processing section broke down. When there is a failure, the image comparison section outputs an output signal reporting the failure to the image processing section. Upon receipt of the output signal, the image processing section performs image processing intended for the event of a failure, and transmits failure information while superimposing the failure information on an image signal, thereby changing a display device to a monochrome display or an alarm display.Type: ApplicationFiled: September 5, 2012Publication date: April 11, 2013Applicant: PANASONIC CORPORATIONInventors: Kazuhisa RAITA, Akihiro SHIBATA, Naoyuki SHIMODA, Takeshi ENDOU
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Publication number: 20110102092Abstract: A semiconductor integrated circuit capable of reliably detecting oscillation stop of a vibrator-type oscillation circuit and reliably restarting the oscillation circuit when oscillation stop is detected is provided. The semiconductor integrated circuit includes one or more main oscillation circuits configured to generate a main clock signal by a vibrator, a ring oscillator configured to always operate independently of the main oscillation circuit, a main clock detection circuit configured to monitor the main clock signal on the basis of an output clock signal of the ring oscillator and to determine an operation state of the main oscillation circuit, and an switch circuit configured to switch a combination of elements making up the main oscillation circuit in response to a detection result of the main clock detection circuit.Type: ApplicationFiled: January 7, 2011Publication date: May 5, 2011Applicant: Panasonic CorporationInventor: Kazuhisa RAITA
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Patent number: 7633351Abstract: A differential amplifier circuit includes: a differential transistor pair composed of first and second transistors; a first resistance connected to a junction point of the first and second transistors at one terminal and to a first voltage node at the other terminal; second and third resistances provided between the first and second transistors, respectively, and a second voltage node; and first and second passive circuits respectively connected to the second and third resistances, the load characteristics of the passive circuits changing according to a control signal supplied. A ring oscillator is composed of a plurality of such differential amplifier circuits connected in a loop.Type: GrantFiled: August 23, 2007Date of Patent: December 15, 2009Assignee: Panasonic CorporationInventors: Kazuhisa Raita, Ichiro Yamane, Yoshitaka Kitao, Toshifumi Hamaguchi, Takahiro Inauchi
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Publication number: 20080061894Abstract: A differential amplifier circuit includes: a differential transistor pair composed of first and second transistors; a first resistance connected to a junction point of the first and second transistors at one terminal and to a first voltage node at the other terminal; second and third resistances provided between the first and second transistors, respectively, and a second voltage node; and first and second passive circuits respectively connected to the second and third resistances, the load characteristics of the passive circuits changing according to a control signal supplied. A ring oscillator is composed of a plurality of such differential amplifier circuits connected in a loop.Type: ApplicationFiled: August 23, 2007Publication date: March 13, 2008Inventors: Kazuhisa Raita, Ichiro Yamane, Yoshitaka Kitao, Toshifumi Hamaguchi, Takahiro Inauchi
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Patent number: 7265707Abstract: An A/D converter of an successive approximation type according to the present invention comprises a sample hold circuit, a reference voltage generating circuit, a comparator for comparing the reference voltage generated by the reference voltage generating circuit to a value of the input analog signal retained in the sample hold circuit, a control circuit for successively controlling the reference voltage generating circuit so that a value of the reference voltage approximates to the value of the input analog signal retained in the sample hold circuit, a buffering circuit for outputting an output value corresponding to an output voltage of the comparator, a latch circuit for retaining the output value of the buffering circuit corresponding to the output value of the comparator per bit as a digital value, and a buffering control circuit for blocking a power supply to the buffering circuit during the sampling period is provided.Type: GrantFiled: April 20, 2006Date of Patent: September 4, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yukihiro Mizukami, Ichirou Yamane, Kazuhisa Raita
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Publication number: 20070182499Abstract: A first comparator outputs a first signal indicative that a voltage determined according to the amount of charge stored in a first capacitor has reached a first reference voltage. A second comparator outputs a second signal indicative that a voltage determined according to the amount of charge stored in a second capacitor has reached a second reference voltage. An RS flip flop circuit is shifted to a set state by one of the first signal and the second signal and shifted to a reset state by the other signal. When the RS flip flop circuit is in the set state, the first capacitor is in a charge state, and the second capacitor is in a discharge state. When the RS flip flop circuit is in the reset state, the first capacitor is in a discharge state, and the second capacitor is in a charge state.Type: ApplicationFiled: February 8, 2007Publication date: August 9, 2007Inventors: Katsushi Wakai, Ichiro Yamane, Toshifumi Hamaguchi, Kazuhisa Raita
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Publication number: 20060238399Abstract: An A/D converter of an successive approximation type according to the present invention comprises a sample hold circuit, a reference voltage generating circuit, a comparator for comparing the reference voltage generated by the reference voltage generating circuit to a value of the input analog signal retained in the sample hold circuit, a control circuit for successively controlling the reference voltage generating circuit so that a value of the reference voltage approximates to the value of the input analog signal retained in the sample hold circuit, a buffering circuit for outputting an output value corresponding to an output voltage of the comparator, a latch circuit for retaining the output value of the buffering circuit corresponding to the output value of the comparator per bit as a digital value, and a buffering control circuit for blocking a power supply to the buffering circuit during the sampling period is provided.Type: ApplicationFiled: April 20, 2006Publication date: October 26, 2006Inventors: Yukihiro Mizukami, Ichirou Yamane, Kazuhisa Raita
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Publication number: 20060097769Abstract: In a level shift circuit constituted by n-channel MOS transistors (TN-A and TN-B) and p-channel MOS transistors (TP-A and TP-B), p-channel MOS transistors (TP-C and TP-D) constituting a current mirror circuit at the transistors (TP-A and TP-B), thereby limiting a direct tunneling current from VDDH to VSS and enabling high-speed operation.Type: ApplicationFiled: October 31, 2005Publication date: May 11, 2006Applicant: Matsushita Electric Industrial Co., LTD.Inventors: Yukihiro Mizukami, Kazuhisa Raita