Abstract: An interface circuit includes an input current limiting circuit for limiting a current of an input signal fed from a preceding circuit, thereby outputting the current-limited signal to a following circuit which is constituted using a MES type transistor. The interface circuit also includes a level shifting circuit supplied with a first higher power supply voltage and a lower power supply voltage, for converting a level of the current-limited signal into a logic level of the following circuit which is supplied with a second higher power supply voltage. The interface circuit further includes a level judging circuit connected between the input current limiting circuit and the level shifting circuit, for judging a logic threshold level of the input signal based on a predetermined level reference voltage. By the constitution, it is possible to adapt the interface circuit for connection to the following circuit constituted using MES type transistors.

Abstract: A compound semiconductor integrated circuit is adapted to provide an interface with respect to an internal circuit which is driven by first and second power source voltages and operates responsive to a logic signal having a predetermined logic level which is different from an emitter-coupled logic level. The compound semiconductor integrated circuit includes an input circuit part which is driven by the first and third power source voltages and receives an input logic signal having the emitter-coupled logic level, and an output circuit part which is driven by the first and second power source voltages and converts an output signal of the input circuit part into a signal having the predetermined logic level. The second power source voltage is lower than the first power source voltage. The third power source voltage is different from the second power source voltage and is lower than the first power source voltage. The output circuit part supplies an output thereof to the internal circuit.