Patents by Inventor Kazuhito Ichihara

Kazuhito Ichihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10546601
    Abstract: A method of setting an upper limit value of the number of write times, which is applied to a magnetic disk device including a disk and a head configured to write data to the disk and read the data from the disk, includes measuring a plurality of bit error rates in a recording area of the disk upon repeatedly writing to an area of the disk adjacent to the recording area a number of write times, deriving a function that approximates a bit error rate in relation to a number of write times, using the measured bit rates corresponding to at least a first number of write times, a second number of write times, and a third number of write times, and applying the function to determine a number of write times that correspond to a first threshold bit error rate that makes the data on the disk unreadable, and setting the determined number of write times as the upper limit value of the number of write times.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: January 28, 2020
    Assignees: TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION, KABUSHIKI KAISHA TOSHIBA
    Inventor: Kazuhito Ichihara
  • Publication number: 20150046764
    Abstract: According to one embodiment, a recording and reproducing apparatus includes a first masking unit configured to apply first bit masking to error correction code (ECC) encoded data using a bit sequence for masking, to generate a masked bit sequence to be recorded on a medium, and a de-masking unit configured to apply de-masking, using the bit sequence for masking, to a sequence of decision values based on a signal read from the medium to generate a sequence of de-masked decision values to be ECC decoded. The bit sequence for masking comprises an iteration of a fixed bit sequence of N (>1) bits. The bit de-masking is an inverse process corresponding to the first bit masking.
    Type: Application
    Filed: December 27, 2013
    Publication date: February 12, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kohsuke HARADA, Akihiro Yamazaki, Yosuke Kondo, Kenji Yoshida, Kazuhito Ichihara, Kazuto Kashiwagi
  • Patent number: 8717697
    Abstract: According to one embodiment, there is provided a controller including an interference cancelling module, a boosting module, and a decoding module. The interference cancelling module generates a first correction signal by cancelling an interference component from an adjacent track in a signal read from a target track of a disk medium. The boosting module generates a second correction signal by boosting a low frequency component of a signal corresponding to the first correction signal. The decoding module decodes a signal based on the second correction signal.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: May 6, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yosuke Kondo, Kohsuke Harada, Kenji Yoshida, Akihiro Yamazaki, Kazuhito Ichihara
  • Publication number: 20090327832
    Abstract: A decoder and recording/reproducing device for preventing an increase in power consumption, has a multi-step iterative decoder. The decoder includes an iterative decoder in which a decoder constituted by a channel decoder and an outer code decoder is installed in multiple steps; an iterative decoding control circuit which estimates an error symbol count after decoding using likelihood information obtained from the outer decoder, stops the interactive decoding, if the estimated error symbol count exceeds an error symbols count, and corrects the residual errors that can be corrected by ECC using the ECC decoder. Therefore if a multi-step iterative decoder is used, the number of times of iterative decoding can be decreased and low power consumption can be implemented.
    Type: Application
    Filed: March 24, 2009
    Publication date: December 31, 2009
    Applicant: FUJITSU LIMITED
    Inventor: Kazuhito Ichihara
  • Patent number: 7434136
    Abstract: An ECC determining unit determines whether an error detected by using an ECC has been corrected. When the detected error has not been corrected, an equalizer output sequence transfer unit transfers an equalizer output sequence yk stored in an equalizer output sequence storage unit to a transfer data storage unit in a hard disk controller, so that a high-performance decoding unit (software) performs repetitive decoding, using the transferred equalizer output sequence yk.
    Type: Grant
    Filed: January 28, 2004
    Date of Patent: October 7, 2008
    Assignee: Fujitsu Limited
    Inventors: Kazuhito Ichihara, Takao Sugawara, Akihiro Yamazaki
  • Publication number: 20070025006
    Abstract: A disk storage device has a plurality of disk faces and a plurality of heads, in which a different S/N is improved for each head. The disk face is formatted in a sector format with which the read/write characteristics become the optimum using the fact that the read/write characteristics differ depending on the sector length, so an improvement of the S/N ratio can be expected compared with a conventional recording/reproducing device using a single format, and the device yield rate and the device performance can be improved, and high recording density can be implemented.
    Type: Application
    Filed: December 12, 2005
    Publication date: February 1, 2007
    Inventor: Kazuhito Ichihara
  • Patent number: 7110199
    Abstract: Upon data recording, a data recording unit inserts revise bytes as a predetermined specific code train into at least two or more portions including the head and last portions of data and records the data onto a medium. Upon data reproduction, a data reproducing unit separates a head reproduced signal by using clocks and, thereafter, executes a clock extraction and an amplitude correction by using a signal corresponding to the revise bytes as a specific code train. In principle, an RLL code for the clock extraction and gain tracking is eliminated and, in place of the RLL code, the revise bytes comprising the specific code train are inserted into the data and the data is recorded onto the medium.
    Type: Grant
    Filed: November 15, 2001
    Date of Patent: September 19, 2006
    Assignee: Fujitsu Limited
    Inventors: Takao Sugawara, Kazuhito Ichihara
  • Patent number: 7031090
    Abstract: In a Maximum A posteriori Probability decoding (MAP decoding), a correlation and a deviation of noises for past and future states which depend on input signal patterns in past N bits and future Q bits are calculated by training by a noise correlation arithmetic operating unit 84 and they are stored. Upon reproduction, in a white noise arithmetic operating unit 91, white noise values for the past and future states in which colored noises are converted into white noises are obtained by using the stored correlation and deviation of the noises. In an input signal arithmetic operating unit 92, an input signal (channel information) ?c(yk|Smk) of the MAP decoding is calculated from the white noise values and the deviation for the past and future states. A likelihood in the MAP decoding is obtained from the input signal.
    Type: Grant
    Filed: October 29, 2001
    Date of Patent: April 18, 2006
    Assignee: Fujitsu Limited
    Inventors: Kazuhito Ichihara, Takao Sugawara, Yuichi Sato, Toshihiko Morita, Motomu Takatsu
  • Patent number: 6842303
    Abstract: A magnetic recording and/or reproducing apparatus includes an equalization section for equalizing a signal sequence which is reproduced from a magnetic recording medium and outputting an equalized waveform, and a conversion section for converting the equalized waveform into a maximum likelihood sequence by carrying out metric calculation based on average values of the equalized waveform.
    Type: Grant
    Filed: August 2, 2001
    Date of Patent: January 11, 2005
    Assignee: Fujitsu Limited
    Inventors: Kazuhito Ichihara, Hiroaki Ueno
  • Publication number: 20040187066
    Abstract: An ECC determining unit determines whether an error detected by using an ECC has been corrected. When the detected error has not been corrected, an equalizer output sequence transfer unit transfers an equalizer output sequence yk stored in an equalizer output sequence storage unit to a transfer data storage unit in a hard disk controller, so that a high-performance decoding unit (software) performs repetitive decoding, using the transferred equalizer output sequence yk.
    Type: Application
    Filed: January 28, 2004
    Publication date: September 23, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Kazuhito Ichihara, Takao Sugawara, Akihiro Yamazaki
  • Publication number: 20030030930
    Abstract: Upon data recording, a data recording unit inserts revise bytes as a predetermined specific code train into at least two or more portions including the head and last portions of data and records the data onto a medium. Upon data reproduction, a data reproducing unit separates a head reproduced signal by using clocks and, thereafter, executes a clock extraction and an amplitude correction by using a signal corresponding to the revise bytes as a specific code train. In principle, an RLL code for the clock extraction and gain tracking is eliminated and, in place of the RLL code, the revise bytes comprising the specific code train are inserted into the data and the data is recorded onto the medium.
    Type: Application
    Filed: November 15, 2001
    Publication date: February 13, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Takao Sugawara, Kazuhito Ichihara
  • Publication number: 20030026028
    Abstract: In a Maximum A posteriori Probability decoding (MAP decoding), a correlation and a deviation of noises for past and future states which depend on input signal patterns in past N bits and future Q bits are calculated by training by a noise correlation arithmetic operating unit 84 and they are stored. Upon reproduction, in a white noise arithmetic operating unit 91, white noise values for the past and future states in which colored noises are converted into white noises are obtained by using the stored correlation and deviation of the noises. In an input signal arithmetic operating unit 92, an input signal (channel information) &Lgr;c(yk|Smk) of the MAP decoding is calculated from the white noise values and the deviation for the past and future states. A likelihood in the MAP decoding is obtained from the input signal.
    Type: Application
    Filed: October 29, 2001
    Publication date: February 6, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Kazuhito Ichihara, Takao Sugawara, Yuichi Sato, Toshihiko Morita, Motomu Takatsu
  • Publication number: 20020101674
    Abstract: A magnetic recording and/or reproducing apparatus includes an equalization section for equalizing a signal sequence which is reproduced from a magnetic recording medium and outputting an equalized waveform, and a conversion section for converting the equalized waveform into a maximum likelihood sequence by carrying out metric calculation based on average values of the equalized waveform.
    Type: Application
    Filed: August 2, 2001
    Publication date: August 1, 2002
    Applicant: FUJITSU LIMITED
    Inventors: Kazuhito Ichihara, Hiroaki Ueno