Abstract: A door handle including a capacitance sensor configured to detect an operation body is provided. The capacitance sensor includes a substrate formed of an insulator and having a surface, at least one first sensor electrode disposed on the surface of the substrate, a plurality of second sensor electrodes disposed on the surface of the substrate, and a controller. The number of the plurality of second sensor electrodes is greater than the number of the at least one first sensor electrode. The controller applies a voltage to the plurality of second sensor electrodes and detects a coordinate position of the operation body, in a case where a capacitance between the operation body and the at least one first sensor electrode is greater than or equal to a predetermined value.

Abstract: It is possible to classify a continuous content into separate series to be written into a storage medium. A reception device receives a digital broadcast program and EIT and generates program attribute information according to the information associated with the series contained in EIT. Upon reception of a write-into-DVD instruction of a recorded digital broadcast program in a program recording region inputted by a user via UI, a write control device integrates the program attribute information in the program attribute information storage region, the write-into-DVD history information in the write-into-DVD history information storage region, and the DVD information obtained from the DVD drive, so as to judge whether write into DVD is enabled. The write control device presents the judgment information to the user via UI and controls write of the recorded digital broadcast program into the DVD according to the user instruction input information acquired via the UI.

Abstract: A data broadcasting system is provided which is capable of achieving display intended and desired by a provider of data broadcasting contents. The data broadcasting system includes a transmitting system and a receiver. The transmitting system includes an HD (High Definition)/SD (Standard Definition) converting section to convert HDTV (High Definition Television) data contents into data contents having a resolution applicable to an SDTV (Standard Definition Television) monitor to obtain SDTV data contents and a multiplexing section to multiplex the SDTV data contents, HDTV video contents, and HDTV data contents.

Abstract: A data broadcasting system is provided which is capable of achieving display intended and desired by a provider of data broadcasting contents. The data broadcasting system includes a transmitting system and a receiver. The transmitting system includes an HD (High Definition)/SD (Standard Definition) converting section to convert HDTV (High Definition Television) data contents into data contents having a resolution applicable to an SDTV (Standard Definition Television) monitor to obtain SDTV data contents and a multiplexing section to multiplex the SDTV data contents, HDTV video contents, and HDTV data contents.

Abstract: A digital video communication system includes, at a source site, an embedding circuit for embedding a digital watermark in a digital video stream to produce a watermarked digital video stream, and a multiplexer for multiplexing a text data stream with the watermarked digital video stream to produce a multiplexed signal. At a sink site, the system includes a demultiplexer for demultiplexing the multiplexed signal for recovering a watermarked digital video stream and a text data stream. A digital watermark detector is provided for detecting the digital watermark embedded in the recovered digital video stream. A synchronizer responds to the detected digital watermark for synchronizing the recovered text data stream to the recovered video stream.

Abstract: A digital satellite broadcast receiving system is proposed in which the necessary packets of an MPEG2-based transport stream can be transferred to the system memory of a computer to facilitate processing of packets by a CPU. The system has means for filtering packets, by packet ID, from an MPEG2-based transport stream, which is output by a digital satellite broadcast tuner, to facilitate section formation from packets of the MPEG2-based transport stream by a CPU of a computer, filtering being performed after the transport stream is descrambled if the broadcast is a subscription broadcast; a buffer memory for storing the filtered data, which has been output by the filter means, until the data can be accessed by a host bus; and DMA control means for transferring, by direct memory access, content of the buffer memory to the system memory of the computer via the host bus.

Abstract: In a system operable in response to a data stream sent to a first receiving device in one-to-one communication via a system bus, the data stream is also simultaneously delivered to a second receiving device via the system bus in parallel. The second receiving device can be implemented by the use of a simple circuit and can quickly process or display the data stream.

Abstract: A time/data adjustment device automatically synchronizes the time in a computer to the time information contained in signals from a broadcast satellite even when the computer is turned off. A broadcast station outputs video data and audio data of a broadcast program, electronic program guide (EPG) and time/date information from a satellite antennae. A geostationary satellite relays the signals to a earth station. A satellite receiving subsystem of the computer, using a stream separator, separates video data, audio data and other data, the EPG and date information are sent to the computer through a bus controller. In the computer, a device driver software acts as the interface between the subsystem and an operating system of the computer to renew the date data in the application software, and also inputs the date data in the real-time clock circuit.

Abstract: In a method of advertising and selling an article or a service, a commercial program about the article or the service for digital TV broadcasting is received by a receiving terminal. Advertiser data relating to a URL address of a homepage of an advertiser of the commercial program is extracted from the commercial program by the receiving terminal in response to a request from a user. Communication is carried out between the receiving terminal and the advertiser via the Internet based on the extracted advertiser data.

Abstract: To reduce access frequency to a CPU for recording/reproducing digital audio data, a control system of FIFO memories of the invention applied to an sound codec apparatus comprises means (2, 4, 7, 9 and 10) for controlling a first and a second FIFO memory (3 and 8) to store recording data sequentially and to output stored recording data sequentially when the apparatus is used exclusively for recording; and controlling the first and the second FIFO memory to store the reproducing data sequentially and to output the stored reproducing data sequentially when the apparatus is used exclusively for reproducing.

Abstract: In a card type recording medium containing a data area where data containing ID information of a holder are recorded, and an image area where image data are recorded, in the image area are recorded second image data which are generated by transforming first image data specifying the holder to frequency-area data, adding the transformed frequency-area data with the ID information and inversely transforming the added data to image signals.

Abstract: A multiple-plane frame buffer is effectively accessed which is provided in a video signal generator in a raster-scan type computer system. The video signal generator further includes a video controller preceded by the multiple-plane frame buffer. The video controller receives multiple-bit-per-pixel data from the multiple-plane frame buffer and applies three primary analog data to a raster-scan display. There is provided a pixel data writing controller which is arranged to store a first multiple-bit-per-pixel data defining each color of image pixels and a second multiple-bit-per-pixel data defining each color of background pixels. The pixel data writing controller selectively applies one of the first and second multiple-bit-per-pixel data to the multiple-plane frame buffer in response to a control signal applied thereto.

Abstract: For use in a character display device, a modifying device comprises first and second memories. The first memory memorizes a character code representative of a character which should be displayed. The second memory memorizes an attribute or characteristic code and a selection code which cooperatively determine modification of the character. The character code, the attribute code and the selection code are read out of the first and the second memories by an address signal which is supplied from a supplying section. Responsive to the character code, a character pattern generating circuit generates a character pattern to supply the character pattern to first through N-th modifying circuits, where N represents a positive integer which is not less than two. Responsive to the attribute code, the first through the N-th modifying circuits modify the character pattern into first through N-th modification signals, respectively, to supply the first through the N-th modification signals to a selecting circuit.