Patents by Inventor Kazuhito Tsukagoshi
Kazuhito Tsukagoshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9825180Abstract: The present invention provides a thin-film transistor in which transistor characteristics such as drain current and threshold voltage are improved, and a method of manufacturing the same. The present invention provides a thin-film transistor provided with a source electrode (108), a drain electrode (109), a semiconductor layer (105), a gate electrode (103), and an insulating layer (104); wherein the semiconductor layer (105) contains a composite metal oxide obtained by adding to a first metal oxide an oxide having an oxygen dissociation energy that is at least 200 kJ/mol greater than the oxygen dissociation energy of the first metal oxide, whereby the amount of oxygen vacancy is controlled; and the insulating layer (104) is provided with an SiO2 layer, a high-permittivity first layer, and a high-permittivity second layer, whereby the dipoles generated at the boundary between the SiO2 layer and the high-permittivity layers are used to control the threshold voltage.Type: GrantFiled: August 26, 2016Date of Patent: November 21, 2017Assignee: National Institute for Materials ScienceInventors: Toshihide Nabatame, Kazuhito Tsukagoshi, Shinya Aikawa, Toyohiro Chikyo
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Patent number: 9741864Abstract: The present invention provides a thin-film transistor in which transistor characteristics such as drain current and threshold voltage are improved, and a method of manufacturing the same. The present invention provides a thin-film transistor provided with a source electrode (108), a drain electrode (109), a semiconductor layer (105), a gate electrode (103), and an insulating layer (104); wherein the semiconductor layer (105) contains a composite metal oxide obtained by adding to a first metal oxide an oxide having an oxygen dissociation energy that is at least 200 kJ/mol greater than the oxygen dissociation energy of the first metal oxide, whereby the amount of oxygen vacancy is controlled; and the insulating layer (104) is provided with an SiO2 layer, a high-permittivity first layer, and a high-permittivity second layer, whereby the dipoles generated at the boundary between the SiO2 layer and the high-permittivity layers are used to control the threshold voltage.Type: GrantFiled: May 2, 2014Date of Patent: August 22, 2017Assignee: National Institute for Materials ScienceInventors: Toshihide Nabatame, Kazuhito Tsukagoshi, Shinya Aikawa
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Publication number: 20160365455Abstract: The present invention provides a thin-film transistor in which transistor characteristics such as drain current and threshold voltage are improved, and a method of manufacturing the same. The present invention provides a thin-film transistor provided with a source electrode (108), a drain electrode (109), a semiconductor layer (105), a gate electrode (103), and an insulating layer (104); wherein the semiconductor layer (105) contains a composite metal oxide obtained by adding to a first metal oxide an oxide having an oxygen dissociation energy that is at least 200 kJ/mol greater than the oxygen dissociation energy of the first metal oxide, whereby the amount of oxygen vacancy is controlled; and the insulating layer (104) is provided with an SiO2 layer, a high-permittivity first layer, and a high-permittivity second layer, whereby the dipoles generated at the boundary between the SiO2 layer and the high-permittivity layers are used to control the threshold voltage.Type: ApplicationFiled: August 26, 2016Publication date: December 15, 2016Applicant: National Institute for Materials ScienceInventors: Toshihide Nabatame, Kazuhito Tsukagoshi, Shinya Aikawa, Toyohiro Chikyo
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Publication number: 20160118501Abstract: The present invention provides a thin-film transistor in which transistor characteristics such as drain current and threshold voltage are improved, and a method of manufacturing the same. The present invention provides a thin-film transistor provided with a source electrode (108), a drain electrode (109), a semiconductor layer (105), a gate electrode (103), and an insulating layer (104); wherein the semiconductor layer (105) contains a composite metal oxide obtained by adding to a first metal oxide an oxide having an oxygen dissociation energy that is at least 200 kJ/mol greater than the oxygen dissociation energy of the first metal oxide, whereby the amount of oxygen vacancy is controlled; and the insulating layer (104) is provided with an SiO2 layer, a high-permittivity first layer, and a high-permittivity second layer, whereby the dipoles generated at the boundary between the SiO2 layer and the high-permittivity layers are used to control the threshold voltage.Type: ApplicationFiled: May 2, 2014Publication date: April 28, 2016Applicant: National Institute for Materials ScienceInventors: Toshihide NABATAME, Kazuhito TSUKAGOSHI, Shinya AIKAWA, Toyohiro CHIKYO
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Publication number: 20160056409Abstract: Provided is an organic EL element which has excellent luminous efficiency by improving the cathode. An organic EL element which is configured of a cathode, an anode and one or more organic compound layers provided between the electrodes, and wherein the cathode is formed of a transparent conductive film that is formed on a glass substrate and is configured from an indium oxide compound and an element having a high work function, so that the cathode has a high work function matched to the HOMO of an organic hole transport layer among the organic compound layers. Consequently, holes can be easily injected from the cathode to the organic hole transport layer, and the present invention is therefore suitable for manufacturing an organic EL element having excellent luminous efficiency.Type: ApplicationFiled: March 28, 2014Publication date: February 25, 2016Applicant: National Institute for Materials ScienceInventors: Toshihide NABATAME, Kazuhito TSUKAGOSHI, Shinya AIKAWA
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Patent number: 8980217Abstract: Provided is a graphene substrate, which is manufactured by: bringing a metal layer into contact with a carbon-containing layer and heating the metal layer to dissolve carbon in the carbon-containing layer into the metal layer; and cooling the metal layer to precipitate the carbon in the metal layer as graphene on any substrate surface.Type: GrantFiled: November 25, 2011Date of Patent: March 17, 2015Assignee: NEC CorporationInventors: Hidefumi Hiura, Kazuhito Tsukagoshi
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Patent number: 8835286Abstract: The invention provides a manufacturing method of a graphene-on-insulator substrate which is mass productive, of high quality, and yet is directly usable for manufacture of semiconductor devices at a low manufacturing cost. According to the manufacturing method of a graphene substrate of the invention, a metal layer and a carbide layer are heated with the metal layer in contact with the carbide layer so that carbon in the carbide layer is dissolved into the metal layer, and then the metal layer and the carbide layer are cooled so that the carbon in the metal layer is segregated as graphene on the surface of the carbide layer.Type: GrantFiled: November 2, 2011Date of Patent: September 16, 2014Assignee: NEC CorporationInventors: Hidefumi Hiura, Kazuhito Tsukagoshi
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Patent number: 8698077Abstract: Provided is a versatile method of determining the number of layers of a two-dimensional atomic layer thin film as compared with conventional methods. An electron beam is radiated to a two-dimensional thin film atomic structure having an unknown number of layers to determine the number of layers based on an intensity of reflected electrons or secondary electrons generated thereby. In particular, this method is effective for determining the number of layers of graphene.Type: GrantFiled: June 22, 2011Date of Patent: April 15, 2014Assignees: NEC Corporation, National Institute for Materials ScienceInventors: Hidefumi Hiura, Kazuhito Tsukagoshi, Hisao Miyazaki
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Publication number: 20130272951Abstract: Provided is a graphene substrate, which is manufactured by: bringing a metal layer into contact with a carbon-containing layer and heating the metal layer to dissolve carbon in the carbon-containing layer into the metal layer; and cooling the metal layer to precipitate the carbon in the metal layer as graphene on any substrate surface.Type: ApplicationFiled: November 25, 2011Publication date: October 17, 2013Applicant: NEC CORPORATIONInventors: Hidefumi Hiura, Kazuhito Tsukagoshi
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Publication number: 20130214253Abstract: The invention provides a manufacturing method of a graphene-on-insulator substrate which is mass productive, of high quality, and yet is directly usable for manufacture of semiconductor devices at a low manufacturing cost. According to the manufacturing method of a graphene substrate of the invention, a metal layer and a carbide layer are heated with the metal layer in contact with the carbide layer so that carbon in the carbide layer is dissolved into the metal layer, and then the metal layer and the carbide layer are cooled so that the carbon in the metal layer is segregated as graphene on the surface of the carbide layer.Type: ApplicationFiled: November 2, 2011Publication date: August 22, 2013Applicant: NEC CORPORATIONInventors: Hidefumi Hiura, Kazuhito Tsukagoshi
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Publication number: 20130087705Abstract: Provided is a versatile method of determining the number of layers of a two-dimensional atomic layer thin film as compared with conventional methods. An electron beam is radiated to a two-dimensional thin film atomic structure having an unknown number of layers to determine the number of layers based on an intensity of reflected electrons or secondary electrons generated thereby. In particular, this method is effective for determining the number of layers of graphene.Type: ApplicationFiled: June 22, 2011Publication date: April 11, 2013Applicants: NATIONAL INSTITUTE FOR MATERIALS SCIENCE, NEC CORPORATIONInventors: Hidefumi Hiura, Kazuhito Tsukagoshi, Hisao Miyazaki
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Publication number: 20120161098Abstract: A semiconductor device is provided which is produced from a high-quality and large-area graphene substrate and is capable of fully exhibiting superior electronic properties that graphene inherently has. The semiconductor device is capable of realizing increased operation speed, reduced power consumption, and higher degree of integration, and thus is capable of improving the reliability and productivity. Electrical short circuit between a graphene layer (4) and a metal catalyst layer for growth of graphene is prevented by causing the metal catalyst layer to be absorbed as a compound/alloyed layer 5 at the interface between a substrate (1) and an oxide layer (2).Type: ApplicationFiled: August 20, 2009Publication date: June 28, 2012Applicant: NEC CORPORATIONInventors: Hidefumi Hiura, Kazuhito Tsukagoshi
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Patent number: 8043978Abstract: Provided is a novel electronic device that comprises graphite, graphene or the like. An electronic device having a substrate, a layer comprising a 6-member ring-structured carbon homologue as the main ingredient, a pair of electrodes, a layer comprising aluminium oxide as the main ingredient and disposed between the pair of electrodes, and a layer comprising aluminium as the main ingredient, wherein the layer comprising aluminium oxide as the main ingredient is disposed between the layer comprising a 6-member ring-structured carbon homologue as the main ingredient and the layer comprising aluminium as the main ingredient so as to be in contact with the two layers.Type: GrantFiled: August 19, 2008Date of Patent: October 25, 2011Assignee: RikenInventors: Hisao Miyazaki, Kazuhito Tsukagoshi, Syunsuke Odaka, Yoshinobu Aoyagi
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Patent number: 7939453Abstract: A method of producing an organic transistor which can form directly an organic semiconductor layer in pattern by simple processes and can produce an organic transistor excellent in transistor characteristics.Type: GrantFiled: February 26, 2009Date of Patent: May 10, 2011Assignees: Dai Nippon Printing Co., Ltd., RikenInventors: Masataka Kano, Kazuhito Tsukagoshi, Takeo Minari
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Publication number: 20100078639Abstract: The present invention provides a method for making a thin film semiconductor device having a bottom-gate, bottom-contact-type thin film transistor structure finer in size with satisfactory characteristics, in which the interface between a gate insulating film and a thin film semiconductor layer can be maintained at satisfactory conditions without being affected by formation of source/drain electrodes. A first gate insulating film (7-1) covering a gate electrode (5) on a substrate (3) is formed, and a pair of source/drain electrodes (9) is formed on the first gate insulating film (7-1). Subsequently, a second gate insulating film (7-2) is selectively formed only on the first gate insulating film (7-2) exposed from the source/drain electrodes (9). Next, a thin film semiconductor layer (11) continuously covering from the source/drain electrodes (9) to the first gate insulating film (7-1) through the second gate insulating film (7-2) is formed while making contact with the source/drain electrodes (9).Type: ApplicationFiled: January 28, 2008Publication date: April 1, 2010Applicants: SONY CORPORATION, RIKENInventors: Kazumasa Nomoto, Nobukazu Hirai, Ryoichi Yasuda, Takeo Minari, Kazuhito Tsukagoshi, Yoshinobu Aoyagi
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Publication number: 20090256144Abstract: A method of producing an organic transistor which can form directly an organic semiconductor layer in pattern by simple processes and can produce an organic transistor excellent in transistor characteristics.Type: ApplicationFiled: February 26, 2009Publication date: October 15, 2009Inventors: Masataka KANO, Kazuhito TSUKAGOSHI, Takeo MINARI
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Publication number: 20090139752Abstract: Provided is a novel electronic device that comprises graphite, graphene or the like. An electronic device having a substrate, a layer comprising a 6-member ring-structured carbon homologue as the main ingredient, a pair of electrodes, a layer comprising aluminium oxide as the main ingredient and disposed between the pair of electrodes, and a layer comprising aluminium as the main ingredient, wherein the layer comprising aluminium oxide as the main ingredient is disposed between the layer comprising a 6-member ring-structured carbon homologue as the main ingredient and the layer comprising aluminium as the main ingredient so as to be in contact with the two layers.Type: ApplicationFiled: August 19, 2008Publication date: June 4, 2009Applicant: RIKENInventors: Hisao Miyazaki, Kazuhito Tsukagoshi, Syunsuke Odaka, Yoshinobu Aoyagi
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Publication number: 20090039563Abstract: A method of fine-pattern formation in which in forming a pattern, a fine pattern formed in a mold can be transferred to a pattering material in a short time at a low temperature and low pressure and, after the transfer of the fine pattern to the patterning material, the fine pattern formed in the patterning material does not readily deform. The method for fine-pattern formation comprises: a first step in which a mold having a fine structure with recesses/protrusions is pressed against a pattering material comprising a polysilane; a second step in which the patterning material is irradiated with ultraviolet to photooxidize the patterning material; a third in which the pressing of the mold against the patterning material is relieved and the mold is drawn from the pattering material; and a fourth step in which that surface of the patterning material to which the fine pattern has been transferred is irradiated with an oxygen plasma to oxidize the surface.Type: ApplicationFiled: August 25, 2006Publication date: February 12, 2009Applicant: RIKENInventors: Motoki Okinaka, Kazuhito Tsukagoshi, Yoshinobu Aoyagi
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Publication number: 20080315190Abstract: This invention provides an organic thin film transistor, which can realize the modification of the surface of a gate insulating layer not only the case where the gate insulating layer is formed of an oxide, but also the case where the gate insulating layer is formed of a material other than the oxide and consequently can significantly improve transistor characteristics, and a method for surface modification of a gate insulating layer in the organic thin film transistor. In an organic thin film transistor comprising a gate insulating layer, an organic semiconductor layer stacked on the gate insulating layer, and an electrode provided on the organic semiconductor layer, a polyparaxylylene layer formed of a continuous polyparaxylylene film is formed on the surface of the gate insulating layer, between the gate insulating layer and the organic semiconductor layer, so as to face and contact with the organic semiconductor layer.Type: ApplicationFiled: August 25, 2006Publication date: December 25, 2008Applicant: RIKENInventors: Kazuhito Tsukagoshi, Kunji Shigeto, Iwao Yagi, Yoshinobu Aoyagi
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Publication number: 20080203271Abstract: There are provided a replica mold which is excellent in transferring a pattern of a master mold, and also has notably excellent hardness, transparency, heat resistance and chemical resistance, and a simple and inexpensive method of manufacturing the replica mold. A method of manufacturing a replica mold according to the present invention includes the steps of: applying, to a substrate, a replica mold material containing a polysilane and a silicone compound; pressing a master mold on which a predetermined minute pattern has been formed to the replica mold material which has been applied to the substrate; irradiating energy rays from a side of the substrate while the master mold is contacted by press with the replica mold material; releasing the master mold; and irradiating the replica mold material with energy rays from a side to which the master mold has been pressed.Type: ApplicationFiled: August 27, 2007Publication date: August 28, 2008Applicants: RIKEN, NIPPON PAINT CO., LTDInventors: Motoki Okinaka, Kazuhito Tsukagoshi, Yoshinobu Aoyagi, Hiroshi Tsushima