Abstract: A hit-less cell switching device capable of switching ATM (Asynchronous Transfer Mode) cells between a system ZERO and a system ONE is disclosed. The system ZERO includes a first cell switch, a first input cell gate, a first output cell gate, and a first shaper. Likewise, the system ONE includes a second cell switch, a second input cell gate, a second output cell gate, and a second shaper. First, a controller opens the first and second input cell gates and first output cell gate, closes the second output cell gate, and puts the first and second cell switches and first and second shapers in a fully switched condition, thereby initializing the switching device. Subsequently, the controller closes the second input cell gate, evacuates queue buffers included in the second cell switch and second shaper, and opens the second output gate. After putting the two cell switches and two shapers in an in-switching state, the controller closes the first input cell gate and opens the second input cell gate simultaneously.