Patents by Inventor Kazuji Yamada

Kazuji Yamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7141741
    Abstract: A semiconductor device in which electrodes of a plurality of semiconductor elements are bonded onto at least one of a plurality of electrode patterns on an insulator substrate, the other surface of the insulator substrate being bonded to a heat dissipating base. The upper surface of the heat dissipating base is covered with a member for cutting off the semiconductor elements from the outer environment. Terminals electrically connect the electrodes on said insulator substrate and the electrode placed outside the cutoff member. The material of the heat dissipating base has a linear expanding coefficient larger than that of the semiconductor element and smaller than three times that of the semiconductor element, and a thermal conductivity larger than 100 W/mK. The semiconductor elements are arranged on at least one electrode surface and in at least two regions divided by the other electrode surface on the insulator substrate.
    Type: Grant
    Filed: September 22, 2003
    Date of Patent: November 28, 2006
    Assignees: Hitachi, Ltd., Hitachi Haramachi Electronics Co., Ltd.
    Inventors: Kazuji Yamada, Akira Tanaka, Ryuichi Saito, Yasutoshi Kurihara, Tadao Kushima, Takashi Haramaki, Yoshihiko Koike, Takashi Hosokawa, Mamoru Sawahata, Masahiro Koizumi, Jin Onuki, Kazuhiro Suzuki, Isao Kobayashi, Hideo Shimizu, Yutaka Higashimura, Shigeki Sekine, Nobuya Koike, Hideya Kokubun
  • Publication number: 20040056349
    Abstract: A semiconductor device in which electrodes of a plurality of semiconductor elements are bonded onto at least one of a plurality of electrode patterns on an insulator substrate, the other surface of the insulator substrate being bonded to a heat dissipating base. The upper surface of the heat dissipating base is covered with a member for cutting off the semiconductor elements from the outer environment. Terminals electrically connect the electrodes on said insulator substrate and the electrode placed outside the cutoff member. The material of the heat dissipating base has a linear expanding coefficient larger than that of the semiconductor element and smaller than three times that of the semiconductor element, and a thermal conductivity larger than 100 W/mK. The semiconductor elements are arranged on at least one electrode surface and in at least two regions divided by the other electrode surface on the insulator substrate.
    Type: Application
    Filed: September 22, 2003
    Publication date: March 25, 2004
    Inventors: Kazuji Yamada, Akira Tanaka, Ryuichi Saito, Yasutoshi Kurihara, Tadao Kushima, Takashi Haramaki, Yoshihiko Koike, Takashi Hosokawa, Mamoru Sawahata, Masahiro Koizumi, Jin Onuki, Kazuhiro Suzuki, Isao Kobayashi, Hideo Shimizu, Yutaka Higashimura, Shigeki Sekine, Nobuya Koike, Hideya Kokubun
  • Patent number: 6680435
    Abstract: An electronic device has a wiring board mounted with an electronic circuit chip. A recess or through-hole is formed in a major surface of the wiring board on which the electronic circuit chip is mounted at a position corresponding to a central portion of the electronic circuit chip. Air trapped in a space between the electronic circuit chip and the wiring board is collected in the recess or through-hole to form a void separated from the electronic circuit chip.
    Type: Grant
    Filed: July 31, 2000
    Date of Patent: January 20, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Toshio Ogawa, Masaaki Takahashi, Noritaka Kamimura, Kazuji Yamada, Toshiaki Kaminaga
  • Patent number: 6594149
    Abstract: A liquid-cooled circuit device including: a module having a circuit element and a module base plate on surface of which the circuit element is mounted; a circuit case for accommodating the module; and a cooling liquid chamber for flowing a cooling liquid in contact with a back face of the module base plate of said module. The module base plate of the module is fitted into an opening provided in a member forming the cooling liquid chamber and welded without a gap.
    Type: Grant
    Filed: March 19, 2002
    Date of Patent: July 15, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Kazuji Yamada, Akihiro Tamba, Takayoshi Nakamura, Ryuichi Saito, Toshio Ogawa, Hisanori Okamura
  • Patent number: 6588647
    Abstract: A liquid-cooled circuit device including: a module having a circuit element and a module base plate on surface of which the circuit element is mounted; a circuit case for accommodating the module; and a cooling liquid chamber for flowing a cooling liquid in contact with a back face of the module base plate of said module. The module base plate of the module is fitted into an opening provided in a member forming the cooling liquid chamber and welded without a gap.
    Type: Grant
    Filed: August 27, 2002
    Date of Patent: July 8, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Kazuji Yamada, Akihiro Tamba, Takayoshi Nakamura, Ryuichi Saito, Toshio Ogawa, Hisanori Okamura
  • Publication number: 20030053298
    Abstract: A liquid-cooled circuit device including: a module having a circuit element and a module base plate on surface of which the circuit element is mounted; a circuit case for accommodating the module; and a cooling liquid chamber for flowing a cooling liquid in contact with a back face of the module base plate of said module. The module base plate of the module is fitted into an opening provided in a member forming the cooling liquid chamber and welded without a gap.
    Type: Application
    Filed: August 27, 2002
    Publication date: March 20, 2003
    Inventors: Kazuji Yamada, Akihiro Tamba, Takayoshi Nakamura, Ryuichi Saito, Toshio Ogawa, Hisanori Okamura
  • Publication number: 20030053294
    Abstract: A liquid-cooled circuit device including: a module having a circuit element and a module base plate on surface of which the circuit element is mounted; a circuit case for accommodating the module; and a cooling liquid chamber for flowing a cooling liquid in contact with a back face of the module base plate of said module. The module base plate of the module is fitted into an opening provided in a member forming the cooling liquid chamber and welded without a gap.
    Type: Application
    Filed: March 19, 2002
    Publication date: March 20, 2003
    Inventors: Kazuji Yamada, Akihiro Tamba, Takayoshi Nakamura, Ryuichi Saito, Toshio Ogawa, Hisanori Okamura
  • Publication number: 20030016502
    Abstract: A semiconductor device in which a plurality of semiconductor elements are bonded onto at least one electrode pattern on an insulator substrate formed a plurality of electrode patterns on the main surface, each of the electrodes of the semiconductor element being electrically connected to the electrode pattern, the other surface of the insulator substrate being bonded to a heat dissipating base, the upper surface of the heat dissipating base being covered with a member for cutting off the semiconductor elements from the outer environment, terminals electrically connecting the electrodes on said insulator substrate and the electrode placed outside the cutoff member being provided, wherein the material of the heat dissipating base has a linear expanding coefficient larger than the linear expansion coefficient of the semiconductor element and smaller than three times of the linear expansion coefficient of the semiconductor element, and a thermal conductivity larger than 100 W/mK, the semiconductor elements being
    Type: Application
    Filed: March 20, 2002
    Publication date: January 23, 2003
    Inventors: Kazuji Yamada, Akira Tanaka, Ryuichi Saito, Yasutoshi Kurihara, Tadao Kushima, Takashi Haramaki, Yoshihiko Koike, Takashi Hosokawa, Mamoru Sawahata, Masahiro Koizumi, Jin Onuki, Kazuhiro Suzuki, Isao Kobayashi, Hideo Shimizu, Yutaka Higashimura, Shigeki Sekine, Nobuya Koike, Hideya Kokubun
  • Publication number: 20020153532
    Abstract: A power semiconductor module comprises a metal base, plural wiring substrates provided on said the base, a first wiring substrate of the wiring substrates having a power circuit portion including a power semiconductor device, and substrate containing portions having a resin portion in which one of the wiring substrates is contained. The one of the wiring substrates is positioned in self-alignment on the metal substrate on the basis of an inner wall of the resin portion of the substrate-containing portion.
    Type: Application
    Filed: June 19, 2002
    Publication date: October 24, 2002
    Inventors: Yukio Sonobe, Akihiro Tamba, Kazuji Yamada, Ryuichi Saito, Masataka Sasaki, Tatsuya Shigemura, Kazuhiro Suzuki, Shigeki Sekine
  • Publication number: 20020145188
    Abstract: Control electrode wirings which are led out from control electrodes over a number of chips built in a flat package and insulating members which are provided in order to insulate the control electrode wirings from main electrode wirings are also given function of positioning of the respective semiconductor chips in the flat package. Further, a one-piece control electrode wiring net is housed in the common electrodes of the package and the electrodes which are led out from the control electrodes of the respective semiconductor chips are connected to the net to simplify the processing of a large number of gate signal wirings.
    Type: Application
    Filed: June 5, 2002
    Publication date: October 10, 2002
    Inventors: Hironori Kodama, Masahiro Nagasu, Hirokazu Inoue, Yasuo Osone, Shigeta Ueda, Kazuji Yamada
  • Patent number: 6452261
    Abstract: Control electrode wirings which are led out from control electrodes over a number of chips built in a flat package and insulating members which are provided in order to insulate the control electrode wirings from main electrode wirings are also given function of positioning of the respective semiconductor chips in the flat package. Further, a one-piece control electrode wiring net is housed in the common electrodes of the package and the electrodes which are led out from the control electrodes of the respective semiconductor chips are connected to the net to simplify the processing of a large number of gate signal wirings.
    Type: Grant
    Filed: September 7, 1999
    Date of Patent: September 17, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Hironori Kodama, Masahiro Nagasu, Hirokazu Inoue, Yasuo Osone, Shigeta Ueda, Kazuji Yamada
  • Patent number: 6434008
    Abstract: A semiconductor device in which a plurality of semiconductor elements are bonded onto at least one electrode pattern on an insulator substrate formed a plurality of electrode patterns on the main surface, each of the electrodes of the semiconductor element being electrically connected to the electrode pattern, the other surface of the insulator substrate being bonded to a heat dissipating base, the upper surface of the heat dissipating base being covered with a member for cutting off the semiconductor elements from the outer environment, terminals electrically connecting the electrodes on said insulator substrate and the electrode placed outside the cutoff member being provided, wherein the material of the heat dissipating base has a linear expanding coefficient larger than the linear expansion coefficient of the semiconductor element and smaller than three times of the linear expansion coefficient of the semiconductor element, and a thermal conductivity larger than 100 W/mK, the semiconductor elements being
    Type: Grant
    Filed: August 27, 1998
    Date of Patent: August 13, 2002
    Assignees: Hitachi, Ltd., Hitachi Haramachi Electronics Co., Ltd.
    Inventors: Kazuji Yamada, Akira Tanaka, Ryuichi Saito, Yasutoshi Kurihara, Tadao Kushima, Takashi Haramaki, Yoshihiko Koike, Takashi Hosokawa, Mamoru Sawahata, Masahiro Koizumi, Jin Onuki, Kazuhiro Suzuki, Isao Kobayashi, Hideo Shimizu, Yutaka Higashimura, Shigeki Sekine, Nobuya Koike, Hideya Kokubun
  • Patent number: 6353258
    Abstract: A semiconductor module has a plurality of power semiconductor devices mounted on a substrate, and a metal foil for wiring is mounted on the substrate so that an asymmetric unit arrangement of the semiconductor devices is formed. In the device, all of the units are arranged in the same direction on the substrate, and all of the units are electrically connected with electrode terminal feet, and the electrode terminal feet are electrically connected with linkage terminal foot. The electrode terminal feet are disposed with a certain interval.
    Type: Grant
    Filed: June 26, 2000
    Date of Patent: March 5, 2002
    Assignees: Hitachi, Ltd., Hitachi Car Engineering Co., Ltd.
    Inventors: Hirokazu Inoue, Ryuichi Saito, Mutsuhiro Mori, Yasutoshi Kurihara, Jin Onuki, Shin Kimura, Satoshi Shimada, Kazuhiro Suzuki, Yukio Kamita, Isao Kobayashi, Kazuji Yamada, Naohiro Momma
  • Publication number: 20010038143
    Abstract: A power semiconductor module comprises a metal base, plural wiring substrates provided on said the base, a first wiring substrate of the wiring substrates having a power circuit portion including a power semiconductor device, and substrate containing portions having a resin portion in which one of the wiring substrates is contained. The one of the wiring substrates is positioned in self-alignment on the metal substrate on the basis of an inner wall of the resin portion of the substrate-containing portion.
    Type: Application
    Filed: July 12, 2001
    Publication date: November 8, 2001
    Inventors: Yukio Sonobe, Akihiro Tamba, Kazuji Yamada, Ryuichi Saito, Masataka Sasaki, Tatsuya Shigemura, Kazuhiro Suzuki, Shigeki Sekine
  • Patent number: 6313598
    Abstract: A power semiconductor module comprising a power semiconductor element included in a power circuit portion and mounted on a metal base, a first resin molded to the power semiconductor element, a control circuit element disposed on the first resin and included at least in a portion of the control circuit, and a control terminal connected to the power circuit portion and having an exposed portion thereof in the surface of the first resin, in which a portion of the control circuit is connected with the power circuit portion at the exposed portion of the control terminal. Accordingly, a resin mold type power semiconductor module capable of realizing a high performance of the control circuit portion at low cost can be realized.
    Type: Grant
    Filed: January 28, 2000
    Date of Patent: November 6, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Akihiro Tamba, Toshio Ogawa, Kazuji Yamada
  • Patent number: 6291880
    Abstract: A semiconductor device includes a main circuit part having a semiconductor device formed on an electrode plate of a lead frame and a control circuit part having protective functions, which is integrally molded by a resin mold part into an integral mold structure.
    Type: Grant
    Filed: February 10, 1999
    Date of Patent: September 18, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Toshio Ogawa, Masaaki Takahashi, Masahiro Gouda, Noritaka Kamimura, Kazuhiro Suzuki, Junichi Saeki, Kazuji Yamada, Makoto Ishii, Akihiro Tamba
  • Patent number: 6144571
    Abstract: In order to bring a moduled power converter into less size and cost in the case of a structure having a lead-insert-case, an insulated metal circuit board and a printed circuit board, a difficulty was encountered in thinning a wiring width and an increase in pad area for each metal wire has interfered with a reduction in its size and cost.In the present invention to cope with it, a power converter is constructed by using a semiconductor module having such a structure that a metal base and lead frames are adhered to each other in a state in which an insulating adhesive sheet is interposed therebetween, a resin-molded outer package is adhered to the metal base with an adhesive or the like, and a resin sealing agent is charged into the resin-molded outer package to thereby integrally seal the resin-molded outer package and circuit parts such as semiconductor elements implemented therein, whereby a reduction in size and cost thereof is realized.
    Type: Grant
    Filed: February 17, 2000
    Date of Patent: November 7, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Yasushi Sasaki, Yutaka Maeno, Hiroshi Fujii, Kinya Nakatsu, Toshio Ogawa, Akihiro Tamba, Kazuji Yamada
  • Patent number: 5956231
    Abstract: A semiconductor device in which a plurality of semiconductor elements are bonded onto at least one electrode pattern on an insulator substrate formed a plurality of electrode patterns on the main surface, each of the electrodes of the semiconductor element being electrically connected to the electrode pattern, the other surface of the insulator substrate being bonded to a heat dissipating base, the upper surface of the heat dissipating base being covered with a member for cutting off the semiconductor elements from the outer environment, terminals electrically connecting the electrodes on said insulator substrate and the electrode placed outside the cutoff member being provided, wherein the material of the heat dissipating base has a linear expanding coefficient larger than the linear expansion coefficient of the semiconductor element and smaller than three times of the linear expansion coefficient of the semiconductor element, and a thermal conductivity larger than 100 W/mK, the semiconductor elements being
    Type: Grant
    Filed: October 4, 1995
    Date of Patent: September 21, 1999
    Assignees: Hitachi, Ltd., Hitachi Haramachi Electronics Co., Ltd.
    Inventors: Kazuji Yamada, Akira Tanaka, Ryuichi Saito, Yasutoshi Kurihara, Tadao Kushima, Takashi Haramaki, Yoshihiko Koike, Takashi Hosokawa, Mamoru Sawahata, Masahiro Koizumi, Jin Onuki, Kazuhiro Suzuki, Isao Kobayashi, Hideo Shimizu, Yutaka Higashimura, Shigeki Sekine, Nobuya Koike, Hideya Kokubun
  • Patent number: 5920119
    Abstract: A power semiconductor module having a power circuit unit; a metal base for sealing the bottom of the module; an insulation substrate for electrically insulating the metal base from the power circuit unit; external input and output terminals connected to the power circuit unit; a resin case in which the external input and output terminals are inserted by integral molding; and a resin encapsulant material has been improved substantially in its reliability through provision of a nut integrally molded with the resin case for fastening the external input and output terminals with a screw; a metal base inserted in the resin case by integral molding; and a recess to receive the end of the screw located immediately below the nut, the recess extending without penetrating the resin case, and the metal base extending to an area below the recess.
    Type: Grant
    Filed: February 21, 1997
    Date of Patent: July 6, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Akihiro Tamba, Kazuji Yamada, Ruichi Saito, Tatsuya Shigemura, Yukio Sonobe, Masataka Sasaki, Kazuhiro Suzuki
  • Patent number: 5661343
    Abstract: An input-output wiring for the power circuit and a ground layer are formed on a metal substrate of a power hybrid integrated circuit apparatus. A plurality of windows are opened at predetermined positions of a circuit substrate to which electronic parts such as an IC driver, a chip resistor etc. are connected. Ceramic chips are soldered on the exposed surface of the metal substrate in the windows, and the power semiconductor elements are connected through metal bridges on the ceramic chips. Connection between lower electrode of adjoining power semiconductor elements or between lower part of the power semiconductor element and an input/output wiring is made by means of a part of the metal bridge.
    Type: Grant
    Filed: March 16, 1995
    Date of Patent: August 26, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Masaaki Takahashi, Kazuji Yamada, Hideki Miyazaki, Kazuo Kato