Patents by Inventor Kazuji Yamazaki

Kazuji Yamazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11889668
    Abstract: A DC/DC converter includes a metal case, a power converter accommodated in the case, a substrate, and a temperature sensor mounted on a surface of the substrate. The case includes a bottom wall, a side wall extending from the bottom wall, a boss, and a coupling portion. The coupling portion couples the side wall to the boss. The coupling portion extends from the bottom wall along an axis of the boss and along a surface of the side wall. The temperature sensor is arranged to face the coupling portion.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: January 30, 2024
    Assignee: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Ryoto Tsuchiya, Masayoshi Kobayashi, Tatsuya Goto, Kazuji Yamazaki
  • Publication number: 20220061193
    Abstract: A DC/DC converter includes a metal case, a power converter accommodated in the case, a substrate, and a temperature sensor mounted on a surface of the substrate. The case includes a bottom wall, a side wall extending from the bottom wall, a boss, and a coupling portion. The coupling portion couples the side wall to the boss. The coupling portion extends from the bottom wall along an axis of the boss and along a surface of the side wall. The temperature sensor is arranged to face the coupling portion.
    Type: Application
    Filed: December 19, 2019
    Publication date: February 24, 2022
    Applicant: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Ryoto TSUCHIYA, Masayoshi KOBAYASHI, Tatsuya GOTO, Kazuji YAMAZAKI
  • Publication number: 20150256149
    Abstract: A noise filter disclosed herein is configured to suppress a common mode voltage that is generated in cables connected to an electric power converter. The noise filter includes: detecting capacitors connected to the cables, respectively, and configured to detect the common mode voltage; an operational amplifier having a positive input terminal via which the common mode voltage detected by the detecting capacitors is inputted; an emitter follower circuit having an input terminal connected to an output terminal of the operational amplifier and having an output terminal connected to a negative input terminal of the operational amplifier; and a transformer configured to apply a compensating voltage to each of the cables by applying a voltage at the output terminal of the emitter follower circuit to each of the cables in opposite phase.
    Type: Application
    Filed: February 5, 2015
    Publication date: September 10, 2015
    Applicant: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Yoshiaki ISHIHARA, Kazuji YAMAZAKI, Naoto KIKUCHI, Yoshitoshi WATANABE
  • Patent number: 9130542
    Abstract: A noise filter disclosed herein is configured to suppress a common mode voltage that is generated in cables connected to an electric power converter. The noise filter includes: detecting capacitors connected to the cables, respectively, and configured to detect the common mode voltage; an operational amplifier having a positive input terminal via which the common mode voltage detected by the detecting capacitors is inputted; an emitter follower circuit having an input terminal connected to an output terminal of the operational amplifier and having an output terminal connected to a negative input terminal of the operational amplifier; and a transformer configured to apply a compensating voltage to each of the cables by applying a voltage at the output terminal of the emitter follower circuit to each of the cables in opposite phase.
    Type: Grant
    Filed: February 5, 2015
    Date of Patent: September 8, 2015
    Assignee: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Yoshiaki Ishihara, Kazuji Yamazaki, Naoto Kikuchi, Yoshitoshi Watanabe
  • Patent number: 6724777
    Abstract: A second processor 6 inserts data to be transmitted and pointer information into a data packet and transmits the data packet at step S20 and then determines whether an acknowledgement from the receiving party has been received at step S22. If no acknowledgement has been received, a determination is made as to whether the number of re-transmissions is equal to or less than a predetermined re-transmission number at step S32. If the re-transmission number is equal to or less than the preset value, then a data packet 16 with the same data is transmitted at step S20. However, if the re-transmission number has reached the preset value, then the number of data bits per data packet is reduced at step S36, and a data packet with reduced data is transmitted at step S20.
    Type: Grant
    Filed: September 1, 1999
    Date of Patent: April 20, 2004
    Assignee: Kabushiki Kaisha Toyoda Jidoshokki Seisakusho
    Inventors: Kazuji Yamazaki, Yukihiro Yamamoto
  • Patent number: 6472949
    Abstract: A signal attenuator may have a first attenuator (1t) and a second attenuator (2t). The first attenuator (1t) is a &pgr;-type resistance attenuator and includes resistors (R1, R2 and R3). The second attenuator (2t) is a &pgr;-type resistance attenuator and includes resistors (R4, R5 and R6) and negative temperature coefficient thermistor (R7). The first attenuator (1t) may be a T-type resistance attenuator. The first attenuator (1t) may be connected in series to each of the input and output of the second attenuator (2t). Such signal attenuators compensate for changes in signal amplitude caused purely by changes in ambient temperature.
    Type: Grant
    Filed: November 13, 2000
    Date of Patent: October 29, 2002
    Assignee: Kabushiki Kaisha Toyoda Jidoshokki Seisakusho
    Inventors: Kazuji Yamazaki, Yoshiki Nagata