Patents by Inventor Kazuki Asao

Kazuki Asao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210301332
    Abstract: Disclosed is a method for determining a success or failure of a nucleic acid amplification comprising obtaining a measurement value corresponding to the amount of a nucleic acid amplified by a nucleic acid amplification reaction of a measurement sample containing the nucleic acid in a state in which the nucleic acid amplification reaction has reached a saturation state; and determining the success or failure of a nucleic acid amplification reaction based on the acquired measurement value.
    Type: Application
    Filed: March 12, 2021
    Publication date: September 30, 2021
    Applicant: SYSMEX CORPORATION
    Inventors: Kazuki ASAO, Kosuke YAMAGUCHI
  • Patent number: 10948507
    Abstract: A specimen transport apparatus according to an embodiment includes: a holder including first and second trenches and configured to hold a specimen; a first transporter including a first protrusion to engage with the first trench and configured to transport the holder by transferring the first protrusion engaged with the first trench in an extension direction of the second trench; a second transporter including a second protrusion to engage with the second trench and configured to transport the holder by transferring the second protrusion engaged with the second trench in an extension direction of the first trench. The first trench is formed in at least one of an upper surface and a lower surface of the holder. The second trench is formed in at least one of the upper surface and the lower surface of the holder, and is formed to extend to a lateral surface of the holder.
    Type: Grant
    Filed: November 28, 2017
    Date of Patent: March 16, 2021
    Assignee: SYSMEX CORPORATION
    Inventors: Yuto Sasaki, Kazuki Asao, Kazuyuki Iguchi, Keiichiro Shohmi, Shoichiro Asada, Hiroaki Tobimatsu, Ryutaro Shinya
  • Publication number: 20210053050
    Abstract: A specimen processing apparatus performs processing on a specimen contained in a container. The specimen processing apparatus includes: holders having different shapes, each of the holders being configured to hold the container; a holder placement unit that comprises holder receiving portions having different shapes, the shapes of the holder receiving portions corresponding to the shapes of the holders; and a specimen processing unit that performs processing on the specimen contained in the container held by one of the holders placed on the holder placement unit.
    Type: Application
    Filed: August 20, 2020
    Publication date: February 25, 2021
    Applicant: SYSMEX CORPORATION
    Inventors: Kazuhiro YAMADA, Kazuki ASAO, Keisuke KUWANO
  • Publication number: 20180149667
    Abstract: A specimen transport apparatus according to an embodiment includes: a holder including first and second trenches and configured to hold a specimen; a first transporter including a first protrusion to engage with the first trench and configured to transport the holder by transferring the first protrusion engaged with the first trench in an extension direction of the second trench; a second transporter including a second protrusion to engage with the second trench and configured to transport the holder by transferring the second protrusion engaged with the second trench in an extension direction of the first trench. The first trench is formed in at least one of an upper surface and a lower surface of the holder. The second trench is formed in at least one of the upper surface and the lower surface of the holder, and is formed to extend to a lateral surface of the holder.
    Type: Application
    Filed: November 28, 2017
    Publication date: May 31, 2018
    Applicant: SYSMEX CORPORATION
    Inventors: Yuto SASAKI, Kazuki ASAO, Kazuyuki IGUCHI, Keiichiro SHOHMI, Shoichiro ASADA, Hiroaki TOBIMATSU, Ryutaro SHINYA
  • Patent number: 9733265
    Abstract: Disclosed is a method for adjusting a position of an aspirator in a sample processing apparatus, the sample processing apparatus comprising the aspirator configured to aspirate a sample or a reagent from a container and a capacitance sensor connected to the aspirator to detect change in capacitance, the method comprising: moving the aspirator above a position adjustment part which is electrically conductive and which is disposed at a predetermined position; obtaining capacitance detected by the capacitance sensor while moving the aspirator; and setting reference position information indicating a reference position of the aspirator based on change in the obtained capacitance.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: August 15, 2017
    Assignee: Sysmex Corporation
    Inventors: Takeo Okuyama, Shoichiro Asada, Tsukasa Hirata, Kazuki Asao
  • Patent number: 9562920
    Abstract: Disclosed is an analyzer comprising: a liquid container mounting section in which a liquid container are set; a container mounting section in which at least one tip container accommodating a plurality of pipette tips is set; a cover detecting section that detects a presence of a cover mounted on the tip container; a dispensing section that equips a pipette tip accommodated in the tip container and dispenses a quantity of liquid from the liquid container to a reaction container via the equipped pipette tip; a detecting section that interrogate a property of the liquid; and a controller programmed to prohibit a process of equipping the pipette tip by the dispensing section when the cover on the tip container is detected, and permits the process when no cover is detected.
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: February 7, 2017
    Assignee: Sysmex Corporation
    Inventors: Kazuki Asao, Tsukasa Hirata
  • Publication number: 20150114140
    Abstract: Disclosed is a method for adjusting a position of an aspirator in a sample processing apparatus, the sample processing apparatus comprising the aspirator configured to aspirate a sample or a reagent from a container and a capacitance sensor connected to the aspirator to detect change in capacitance, the method comprising: moving the aspirator above a position adjustment part which is electrically conductive and which is disposed at a predetermined position; obtaining capacitance detected by the capacitance sensor while moving the aspirator; and setting reference position information indicating a reference position of the aspirator based on change in the obtained capacitance.
    Type: Application
    Filed: October 29, 2014
    Publication date: April 30, 2015
    Inventors: Takeo OKUYAMA, Shoichiro ASADA, Tsukasa HIRATA, Kazuki ASAO
  • Publication number: 20150093754
    Abstract: Disclosed is an analyzer comprising: a liquid container mounting section in which a liquid container are set; a container mounting section in which at least one tip container accommodating a plurality of pipette tips is set; a cover detecting section that detects a presence of a cover mounted on the tip container; a dispensing section that equips a pipette tip accommodated in the tip container and dispenses a quantity of liquid from the liquid container to a reaction container via the equipped pipette tip; a detecting section that interrogate a property of the liquid; and a controller programmed to prohibit a process of equipping the pipette tip by the dispensing section when the cover on the tip container is detected, and permits the process when no cover is detected.
    Type: Application
    Filed: September 25, 2014
    Publication date: April 2, 2015
    Inventors: Kazuki ASAO, Tsukasa HIRATA
  • Publication number: 20080066035
    Abstract: Disclosed is a design method for optimizing the timings at which a plurality of power supply switches in a power gating circuit in a semiconductor integrated circuit by the steps of (A) providing a motion model of the power gating circuit, (B) setting a constraint on in-rush current, (C) performing a circuit simulation using the motion model, and (D) generating timing data indicating the timings at which the plurality of power supply switches are turned on based on the result of the circuit simulation. The design method enables easy designing of a semiconductor integrated circuit where the plurality of power supply switches are turned on by step so that the constraint on the in-rush current is satisfied.
    Type: Application
    Filed: September 7, 2007
    Publication date: March 13, 2008
    Inventor: Kazuki Asao
  • Patent number: 6456137
    Abstract: First and second wires are disposed adjacent to each other. Even pairs of buffers and inverters are disposed on the wires. A buffer and an inverter in each of the pairs are disposed on the first or second wires respectively. The first and second wires are respectively divided to even wire sections by the even pairs and a device or terminal connected to the output side of the pairs. Lengths of the wire sections are equal to each other between adjacent wire sections of the first and second wires. Gaps between the first and second wires are equal to each other between each two wire sections from the input side of the first and second wires.
    Type: Grant
    Filed: November 22, 2000
    Date of Patent: September 24, 2002
    Assignee: NEC Corporation
    Inventor: Kazuki Asao
  • Patent number: 5847967
    Abstract: A reference connection pattern is determined within a three-dimensional region together with the other connection patterns to extract data for pattern matching operation from a position of each connection pattern. An estimated parasitic load is also given as the data and is stored as a part of reference pattern data to form a data base. By the pattern matching operation between the reference pattern data and an object pattern, a coincident one of the reference pattern data is determined as a practical parasitic load. Thus, the estimated parasitic load included in the reference pattern data is detected as the practical parasitic load in the object pattern.
    Type: Grant
    Filed: July 31, 1996
    Date of Patent: December 8, 1998
    Assignee: NEC Corporation
    Inventor: Kazuki Asao
  • Patent number: D743047
    Type: Grant
    Filed: September 26, 2013
    Date of Patent: November 10, 2015
    Assignee: SYSMEX CORPORATION
    Inventors: Kazuki Asao, Keiichiro Shohmi, Katsuhiko Jindo
  • Patent number: D744553
    Type: Grant
    Filed: June 2, 2014
    Date of Patent: December 1, 2015
    Assignee: SYSMEX CORPORATION
    Inventors: Fumie Shibata, Yoshinori Ooi, Keiichiro Shohmi, Kazuki Asao