Patents by Inventor Kazuki Mizukami

Kazuki Mizukami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12206370
    Abstract: A semiconductor device is provided in which power consumption is reduced and an increase in circuit area is inhibited. The semiconductor device includes a high frequency amplifier circuit, an envelope detection circuit, and a power supply circuit. The power supply circuit has a function of supplying a power supply potential to the high frequency amplifier circuit, an output of the high frequency amplifier circuit is connected to the envelope detection circuit, and an output of the envelope detection circuit is connected to the power supply circuit. The power supply circuit can reduce the power consumption by changing the power supply potential in accordance with the output of the high frequency amplifier circuit. The use of an OS transistor in the envelope detection circuit can inhibit an increase in circuit area.
    Type: Grant
    Filed: June 16, 2020
    Date of Patent: January 21, 2025
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hitoshi Kunitake, Takayuki Ikeda, Kiyoshi Kato, Yuichi Yanagisawa, Shota Mizukami, Kazuki Tsuda
  • Patent number: 11640337
    Abstract: User data and redundant codes are stored in a distributed manner, and data is read while suppressing performance degradation due to the occurrence of a failure. If a first node in a distributed storage system receives a read request from a host to read the user data when a storage device of its own node is blocked, the first node executes a first collection read request which requests recovery of data from the secondary redundant code corresponding to target data of the read request; and if at least part of the target data has failed to be recovered according to the first collection read request, regarding insufficient data among a plurality of pieces of data which are necessary to recover the target data by using the primary redundant code, the first node executes a second collection read request which requests recovery of the insufficient data from the secondary redundant code.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: May 2, 2023
    Assignee: HITACHI, LTD.
    Inventors: Kazuki Mizukami, Hiroaki Miyata
  • Publication number: 20220206897
    Abstract: User data and redundant codes are stored in a distributed manner, and data is read while suppressing performance degradation due to the occurrence of a failure. If a first node in a distributed storage system receives a read request from a host to read the user data when a storage device of its own node is blocked, the first node executes a first collection read request which requests recovery of data from the secondary redundant code corresponding to target data of the read request; and if at least part of the target data has failed to be recovered according to the first collection read request, regarding insufficient data among a plurality of pieces of data which are necessary to recover the target data by using the primary redundant code, the first node executes a second collection read request which requests recovery of the insufficient data from the secondary redundant code.
    Type: Application
    Filed: September 10, 2021
    Publication date: June 30, 2022
    Inventors: Kazuki MIZUKAMI, Hiroaki MIYATA
  • Patent number: 10523227
    Abstract: An A/D converter includes an adder that calculates a difference between an analog input signal and a predicted value, a quantizer that quantizes the difference output from the adder to convert the analog input signal to a digital signal, a prediction filter that generates a predicted value from the digital signal output from the quantizer, and a D/A converter that converts the predicted value from a digital signal to an analog signal and output the predicted value to the adder. The predicted value before being subjected to conversion to the analog signal by the D/A converter defines and functions as an A/D converted output of the analog input signal input to the adder.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: December 31, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yasuhide Takase, Yasuyuki Matsuya, Eri Mizukami, Yuji Inagaki, Kazuki Mizukami, Nozomi Watanabe, Riku Yonekawa
  • Publication number: 20190044527
    Abstract: An A/D converter includes an adder that calculates a difference between an analog input signal and a predicted value, a quantizer that quantizes the difference output from the adder to convert the analog input signal to a digital signal, a prediction filter that generates a predicted value from the digital signal output from the quantizer, and a D/A converter that converts the predicted value from a digital signal to an analog signal and output the predicted value to the adder. The predicted value before being subjected to conversion to the analog signal by the D/A converter defines and functions as an A/D converted output of the analog input signal input to the adder.
    Type: Application
    Filed: October 12, 2018
    Publication date: February 7, 2019
    Inventors: Yasuhide TAKASE, Yasuyuki MATSUYA, Eri Mizukami, Yuji INAGAKI, Kazuki Mizukami, Nozomi WATANABE, Riku YONEKAWA