Patents by Inventor Kazuki WADA

Kazuki WADA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12249819
    Abstract: An electric junction box is provided. The electric junction box includes a frame configured to accommodate components, and a lower cover assembled to close a lower end opening of the frame. The lower cover includes a first lower cover having a bottom wall, a side wall, and a notch, and a second lower cover having a shape corresponding to the notch and assembled to the first lower cover. The second lower cover includes a side wall, a blow-up preventing wall, and a reinforcing rib.
    Type: Grant
    Filed: April 13, 2023
    Date of Patent: March 11, 2025
    Assignee: YAZAKI CORPORATION
    Inventors: Masahiro Wada, Takaaki Kakimi, Kazuki Shoji, Kengo Aono
  • Patent number: 12249820
    Abstract: An electric junction box include a tubular frame portion having a main accommodating portion, and a cover portion attached to the frame portion so as to close an opening portion of the frame portion and having a through hole through which an electric wire coupled to the electronic component is inserted. The cover portion includes a first cover portion having a plate-shaped portion disposed to face an opening surface of the opening portion and a first side wall portion erected from a peripheral edge of the plate-shaped portion toward an opening edge of the opening portion, and a second cover portion having a second side wall portion disposed between at least a part of a erecting end of the first side wall portion and the opening edge of the opening portion and a sub accommodating portion provided inside the second side wall portion.
    Type: Grant
    Filed: June 16, 2023
    Date of Patent: March 11, 2025
    Assignee: YAZAKI CORPORATION
    Inventors: Masahiro Wada, Takaaki Kakimi, Kazuki Shoji, Kengo Aono
  • Patent number: 12233745
    Abstract: An estimation device includes: an acquisition unit that acquires a voltage, a current, and a temperature of a lead-acid battery; a first deriving unit that derives a first SOC and a second SOC that are SOCs of a start point and an end point of an estimation period; a second deriving unit that derives a total amount of an overcharge amount in the estimation period; a third deriving unit that derives an actual measurement error based on a difference between the first SOC and the second SOC and the total amount of the overcharge amount; a first specification unit that specifies an estimation error based on the first SOC, the second SOC, and the temperature, and a relationship between the first SOC, the second SOC, and the temperature of the lead-acid battery, and the estimation error; a second specification unit that specifies an abnormality degree of the actual measurement error based on the derived actual measurement error and the specified estimation error; and an estimation unit that estimates generation of
    Type: Grant
    Filed: October 2, 2020
    Date of Patent: February 25, 2025
    Assignee: GS Yuasa International Ltd.
    Inventors: Naohisa Okamoto, Kazuki Sekiya, Yasuyuki Hamano, Hidetoshi Wada
  • Publication number: 20240006334
    Abstract: An interconnect substrate includes an insulating layer, a dispersion layer, and an interconnect layer, the insulating layer, the dispersion layer, and the interconnect layer being laminated together, wherein the dispersion layer includes a main material and one or more fillers dispersed in the main material, the one or more fillers forming a unique dispersion pattern, and wherein the unique dispersion pattern is identifiable by image recognition from outside of the interconnect substrate.
    Type: Application
    Filed: June 26, 2023
    Publication date: January 4, 2024
    Inventor: Kazuki WADA