Abstract: To appropriately control communication even when a reference signal is dynamically triggered, a user terminal according to one aspect of the present disclosure includes: a receiving section that receives a downlink shared channel and a Channel State Information (CSI) reference signal; and a control section that controls reception processing of the downlink shared channel based on at least one of cells that respectively transmit first downlink control information channel and second downlink control information, cells that respectively transmit the second downlink control information and the CSI reference signal, and resources that are indicated respectively by the first downlink control information and the second downlink control information, the first downlink control information being used to schedule the downlink shared channel, and the second downlink control information being used to trigger the CSI reference signal.

Abstract: An image forming apparatus includes a drum unit, a developing unit, a developing roller bearing, a guide portion, and an urging portion. The drum unit includes a photosensitive drum. The developing unit includes a developing roller. The developing roller bearing supports the developing roller and can move radially and rotate axially with respect to the developing unit. The guide portion is formed in the drum unit and guides the developing roller bearing in directions toward and away from the photosensitive drum. The urging portion urges the developing unit in such a direction that it presses the developing roller against the photosensitive drum. The developing unit includes a restriction portion that restricts the rotation of the developing roller bearing with respect to the developing unit within a predetermined range.

Abstract: To appropriately control communication even when a reference signal is dynamically triggered, a user terminal according to one aspect of the present disclosure includes: a receiving section that receives a downlink shared channel and a Channel State Information (CSI) reference signal; and a control section that, when first downlink control information used to schedule the downlink shared channel and second downlink control information used to trigger the CSI reference signal are transmitted by different cells, and resources respectively indicated by the first downlink control information and the second downlink control information overlap, performs control not to perform at least one of reception of the downlink shared channel and measurement that uses the CSI reference signal.

Abstract: A transfer device includes a transfer drum that rotates in conjunction with a fixing roller, a transfer belt that transfers an image onto a medium while rotating along with the transfer drum in a state where the medium is nipped between the transfer belt and the transfer drum, a pressing member that is disposed in a space enclosed by the transfer belt, and a switching unit that moves the pressing member and switches between a pressed state in which the transfer belt is pressed against the transfer drum and a separated state in which the transfer belt is separated from the transfer drum.

Abstract: Provided is a surface treatment agent capable of imparting superior antifouling property as well as good and durable hydrophilicity to an inorganic substrate. The surface treatment agent is one comprising a pretreatment agent and a hydrophilizing treatment agent and being to be sequentially applied to an inorganic substrate, wherein the pretreatment agent comprises a silane compound having a reactive silyl group and an organic functional group and a polyfunctional monomer, and the polyfunctional monomer has one or more first reactive groups that react with the organic functional group and one or more second reactive groups that react with the hydrophilizing treatment agent.

Abstract: Provided is a hydrophilic treatment coating composition which imparts a soil guard property and is superior in durability of soil guard performance. Provided is a hydrophilic treatment coating composition for an inorganic substrate surface-treated with a silane coupling agent (S), comprising a hydrophilic compound (A) and a hydrophilic compound (B), wherein the hydrophilic compound (A) is a compound having at least one of a sulfonic acid group and an alkali metal salt of a sulfonic acid group, and the hydrophilic compound (B) is a compound having a quaternary ammonium cationic group.

Abstract: Disclosed is a gas sensor element having: a solid electrolyte body containing oxygen-ion conductive ZrO2; a detection electrode disposed on the solid electrolyte body to be exposed to a gas under measurement; and a reference electrode disposed on the solid electrolyte body to be exposed to a reference gas. In the gas sensor element, the detection electrode contains Pt and ZrO2; the detection electrode has a thickness of 3 to 10 ?m; the amount of ZrO2 contained relative to Pt in the detection electrode is 12 to 18 wt %; the detection electrode has a porosity of 5% or lower; and, in a particle size distribution graph of ZrO2 particles in the detection electrode, a cumulative value of peaks appearing in a range of 0.025 ?m to 0.200 ?m is 60 to 75%, and a cumulative value of peaks appearing in a range of 1.000 ?m to 3.162 ?m is 2 to 7%.

Abstract: Disclosed is a gas sensor element having: a solid electrolyte body containing oxygen-ion conductive ZrO2; a detection electrode disposed on the solid electrolyte body to be exposed to a gas under measurement; and a reference electrode disposed on the solid electrolyte body to be exposed to a reference gas. In the gas sensor element, the detection electrode contains Pt and ZrO2; the detection electrode has a thickness of 3 to 10 ?m; the amount of ZrO2 contained relative to Pt in the detection electrode is 12 to 18 wt %; the detection electrode has a porosity of 5% or lower; and, in a particle size distribution graph of ZrO2 particles in the detection electrode, a cumulative value of peaks appearing in a range of 0.025 ?m to 0.200 ?m is 60 to 75%, and a cumulative value of peaks appearing in a range of 1.000 ?m to 3.162 ?m is 2 to 7%.

Abstract: A power source generation circuit includes a regulator circuit which receives an external power source voltage VDDA from an external power source, and generates a predetermined internal power source voltage on a given terminal VDD; and a charging circuit which connects the external power source and the given terminal when the external power source voltage VDDA supplied from the external power source is equal to or lower than a predetermined threshold voltage.

Abstract: A power source generation circuit includes a regulator circuit which receives an external power source voltage VDDA from an external power source, and generates a predetermined internal power source voltage on a given terminal VDD; and a charging circuit which connects the external power source and the given terminal when the external power source voltage VDDA supplied from the external power source is equal to or lower than a predetermined threshold voltage.

Abstract: A power source generation circuit includes a regulator circuit which receives an external power source voltage VDDA from an external power source, and generates a predetermined internal power source voltage on a given terminal VDD; and a charging circuit which connects the external power source and the given terminal when the external power source voltage VDDA supplied from the external power source is equal to or lower than a predetermined threshold voltage.

Abstract: A power source generation circuit includes a regulator circuit which receives an external power source voltage VDDA from an external power source, and generates a predetermined internal power source voltage on a given terminal VDD; and a charging circuit which connects the external power source and the given terminal when the external power source voltage VDDA supplied from the external power source is equal to or lower than a predetermined threshold voltage.

Abstract: In a semiconductor device, a self-test circuit includes a write part for writing data in a given address of a special region of a nonvolatile memory; a read part for reading the written data from the given address; a verify part for determining whether or not the written data accords with the read data; and a decision part for determining soundness of the nonvolatile memory on the basis of a result of determination made by the verify part. In the case where the written data accords with the read data, the decision part determines that the nonvolatile memory is sound, and in the case where the data do not accord with each other, it determines that the nonvolatile memory is unsound.

Abstract: A semiconductor device according to the present invention comprises a first non-volatile memory, a second non-volatile memory in which initial data is stored, and an initialization controller for initializing the first non-volatile memory, wherein the second non-volatile memory has anti-stress properties higher than those of the first non-volatile memory, and the initialization controller reads the initial data from the second non-volatile memory when the first non-volatile memory is initialized and copies the read initial data in the first non-volatile memory to thereby initialize the first non-volatile memory.

Abstract: In a semiconductor device, a self-test circuit includes a write part for writing data in a given address of a special region of a nonvolatile memory; a read part for reading the written data from the given address; a verify part for determining whether or not the written data accords with the read data; and a decision part for determining soundness of the nonvolatile memory on the basis of a result of determination made by the verify part. In the case where the written data accords with the read data, the decision part determines that the nonvolatile memory is sound, and in the case where the data do not accord with each other, it determines that the nonvolatile memory is unsound.

Abstract: In a semiconductor device, a self-test circuit includes a write part for writing data in a given address of a special region of a nonvolatile memory; a read part for reading the written data from the given address; a verify part for determining whether or not the written data accords with the read data; and a decision part for determining soundness of the nonvolatile memory on the basis of a result of determination made by the verify part. In the case where the written data accords with the read data, the decision part determines that the nonvolatile memory is sound, and in the case where the data do not accord with each other, it determines that the nonvolatile memory is unsound.

Abstract: The present invention provides a semiconductor device which sufficiently ensures the security and prevents the decline of the yield even when the failure or the like causes a bit change in the data of the test mode control flag stored in the nonvolatile memory. The semiconductor device of the present invention includes: a nonvolatile memory which stores a test mode control code in a predetermined address; a generation unit which generates a fixed value indicating permission for or prohibition of a test mode; and a Hamming distance determination circuit which controls switching to the test mode depending on whether or not a Hamming distance between the control code and the fixed value is equal to or less than a predetermined number.

Abstract: A semiconductor device according to the present invention comprises a first non-volatile memory, a second non-volatile memory in which initial data is stored, and an initialization controller for initializing the first non-volatile memory, wherein the second non-volatile memory has anti-stress properties higher than those of the first non-volatile memory, and the initialization controller reads the initial data from the second non-volatile memory when the first non-volatile memory is initialized and copies the read initial data in the first non-volatile memory to thereby initialize the first non-volatile memory.

Abstract: In a semiconductor device, a self-test circuit includes a write part for writing data in a given address of a special region of a nonvolatile memory; a read part for reading the written data from the given address; a verify part for determining whether or not the written data accords with the read data; and a decision part for determining soundness of the nonvolatile memory on the basis of a result of determination made by the verify part. In the case where the written data accords with the read data, the decision part determines that the nonvolatile memory is sound, and in the case where the data do not accord with each other, it determines that the nonvolatile memory is unsound.