Patents by Inventor Kazuma OHARA
Kazuma OHARA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230208436Abstract: Provided is a delta-sigma modulator including a first integral unit configured to integrate an input analog signal, a second integral unit configured to integrate a signal output by the first integral unit, a quantizer configured to quantize a signal output by the second integral unit, a DA converter configured to perform DA conversion on an output of the quantizer and output a feedback signal to be fed back to the first integral unit, and a control unit configured to perform control to cause the first integral unit and the second integral unit to perform different integral operations during a first period and a second period, in which the second integral unit is configured to receive the feedback signal output by the DA converter via the first integral unit and integrate the feedback signal during the first period and the second period.Type: ApplicationFiled: December 14, 2022Publication date: June 29, 2023Inventor: Kazuma OHARA
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Patent number: 11634139Abstract: A vehicle control device in an embodiment includes a recognition unit that recognizes a surrounding situation of a vehicle and a driving control unit that controls one or both of steering and acceleration or deceleration of the vehicle on the basis of the surrounding situation recognized by the recognition unit, and in a case where the vehicle merges into a second lane from a first lane in which the vehicle travels, and a section of the second lane before merging recognized by the recognition unit is downhill, the driving control unit makes a speed or acceleration of the vehicle higher than in a case where the section before merging is not downhill.Type: GrantFiled: September 9, 2019Date of Patent: April 25, 2023Assignee: HONDA MOTOR CO., LTD.Inventors: Takuya Niioka, Takayasu Kumano, Kazuma Ohara, Suguru Yanagihara, Yuki Motegi
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Patent number: 11599681Abstract: The present invention provides a bit decomposition secure computation system comprising: a share value storage apparatus to store share values obtained by applying (2, 3) type RSS using modulo of power of 2 arithmetic; a decomposed share value storage apparatus to store a sequence of share values obtained by applying (2, 3) type RSS using modulo 2 arithmetic; and a bit decomposition secure computation apparatus that, with respect to sharing of a value w, r1, r2, and r3 satisfying w=r1+r2+r3 mod 2{circumflex over (?)}n, where {circumflex over (?)} is a power operator and n is a preset positive integer, being used as share information by the (2, 3) type RSS stored in the share value storage apparatus, includes: an addition sharing unit that sums two values out of r1, r2 and r3 by modulo 2{circumflex over (?)}n, generates and distributes a share value of the (2, 3) type RSS with respect to the sum; and a full adder secure computation unit that executes addition processing of the value generated by the addition sType: GrantFiled: May 18, 2017Date of Patent: March 7, 2023Assignees: NEC CORPORATION, BAR-ILAN UNIVERSITYInventors: Toshinori Araki, Kazuma Ohara, Jun Furukawa, Lindell Yehuda, Nof Ariel
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Publication number: 20220343027Abstract: A computation system according to the present disclosure includes: shuffling secure computation means for executing secure computation processing by shuffling; random bit sharing means for generating, as security parameters, K pieces of random data; and unauthorized action detecting secure computation means for determining that an exclusive OR operation of values for all rows obtained by multiplying the exclusive OR operation of each row of the tables before the shuffling processing for each data designated by the i-th random data by the i-th random bit of each row is the same as an exclusive OR operation of values for all rows obtained by multiplying the exclusive OR operation of each row of the tables after the shuffling processing for each data designated by the i-th random data by the i-th random bit of each row.Type: ApplicationFiled: September 26, 2019Publication date: October 27, 2022Applicants: NEC Corporation, BAR-ILAN UNIVERSITYInventors: Toshinori ARAKI, Kazuma OHARA, Hikaru TSUCHIDA, Jun FURUKAWA, Binyamin PINKAS
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Publication number: 20220329596Abstract: In a secret computation system, each of the three or more secret computation servers is configured to transmit, to the auxiliary server, carry computation information for computing a carry indicating whether or not digit carry occurs when a share of arithmetic operation is added as a binary number. The auxiliary server is configured to compute the carry based on the carry computation information received and compute an adjustment value used for computing the share of the arithmetic operation from a share of logical operation by using the computed carry. The auxiliary server distributes the computed adjustment value to the three or more secret computation servers. Each of the three or more secret computation servers is configured to convert the share of the logical operation to the share of the arithmetic operation by using a distributed value of the adjustment value.Type: ApplicationFiled: October 4, 2019Publication date: October 13, 2022Applicant: NEC CorporationInventors: Hikaru TSUCHIDA, Toshinori ARAKI, Kazuma OHARA
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Patent number: 11468796Abstract: This numerical splitting device: acquires a numerical value w and a parameter p; generates a first random number r1 and a second random number r2; computes a third random number r3 based on the numerical value w, parameter p, first random number r1, and second random number r2 according to an expression, r3=w?r1-r2 mod p; computes first to third segments s1, s2, s3 based on the first to third random numbers r1, r2, r3 and the parameter p according to expressions, s1=r1+r2 mod p, s2=r2+r3 mod p, and s3=r3+r1 mod p; and transmits a pair of the first segment s1 and the second random number r2, a pair of the second segment s2 and the third random number r3, and a pair of the third segment s3 and the first random number r1 to first to third secure computation devices, respectively.Type: GrantFiled: May 18, 2017Date of Patent: October 11, 2022Assignee: NEC CORPORATIONInventors: Toshinori Araki, Kazuma Ohara
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Patent number: 11460579Abstract: A road surface detection device, which detects a road surface of a road on which a host vehicle runs, includes: a sensor configured to detect three-dimensional positional information at individual detection points by scanning a layer that includes the road surface; and an external environment recognition unit configured to calculate two-dimensional positional information in which positional information in a height direction has been removed from the positional information at the individual detection points included in the layer, to calculate, based on the two-dimensional positional information, a point sequence of the individual detection points in a two-dimensional coordinate plane, and to detect a trench existing in the road surface in accordance with a state of change of the point sequence.Type: GrantFiled: March 9, 2020Date of Patent: October 4, 2022Assignee: Honda Motor Co., Ltd.Inventors: Kazuma Ohara, Naoki Mori
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Patent number: 11435988Abstract: There is provided a conversion apparatus with which a secure computation execution environment may be easily constructed. The conversion apparatus comprises an input part and a conversion part. The input part inputs a source code. The conversion part converts the input source code so that a secure computation compiler processes it based on setting information relating to secret computation executed by a plurality of secure computation servers.Type: GrantFiled: September 20, 2018Date of Patent: September 6, 2022Assignee: NEC CORPORATIONInventors: Toshinori Araki, Hikaru Tsuchida, Kazuma Ohara
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Publication number: 20220261507Abstract: A secure computation server includes: a computation processing part that performs secure computation by using data x received from a client and computes a computation result R; and a trail registration part that makes a predetermined trail storage system to store first trail data for certifying identity of the data x, the first trail data having been calculated from the data x, and second trail data for certifying a relationship between the data x and the computation result R. The predetermined trail storage system manages the first and second trail data in a non-rewritable manner and provides the first and second trail data to a predetermined audit node.Type: ApplicationFiled: July 24, 2019Publication date: August 18, 2022Applicant: NEC CorporationInventors: Hikaru TSUCHIDA, Kazuma OHARA, Toshinori ARAKI, Takuma AMADA
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Patent number: 11381390Abstract: A bit-decomposition secure computation apparatus uses r1, r2, and r3 satisfying w=r1+r2+r3 mod 2{circumflex over (?)}n as share information of (2, 3) threshold type RSS (Replicated Secret Sharing) stored in a share value storage apparatus, and includes an addition sharing part that sums two values out of the share information by modulo 2{circumflex over (?)}n arithmetic and distributes the sum using (2, 3) type RSS; and a full adder secure computation part that adds the value generated by the addition sharing part by distributing the sum of the two values to share information of one remaining value other than the two values used by the addition sharing part for each digit by using secure computation of a full adder.Type: GrantFiled: October 31, 2017Date of Patent: July 5, 2022Assignee: NEC CORPORATIONInventors: Toshinori Araki, Kazuma Ohara, Jun Furukawa
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Patent number: 11380120Abstract: In a driving assistance device, a human body specifying unit acquires, as human body information, an image of a human body existing around a host vehicle in image data acquired by a camera. A quasi-skeleton estimation unit estimates a quasi-skeleton of the human body from the human body information. The radar or the LiDAR measures a distance to a part of the human body that corresponds to the quasi-skeleton.Type: GrantFiled: March 27, 2020Date of Patent: July 5, 2022Assignee: Honda Motor Co., Ltd.Inventors: Ryoji Wakayama, Kazuma Ohara
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Publication number: 20220188706Abstract: There is provided a system for computing a secure statistical classifier, comprising: at least one hardware processor executing a code for: accessing code instructions of an untrained statistical classifier, accessing a training dataset, accessing a plurality of cryptographic keys, creating a plurality of instances of the untrained statistical classifier, creating a plurality of trained sub-classifiers by training each of the plurality of instances of the untrained statistical classifier by iteratively adjusting adjustable classification parameters of the respective instance of the untrained statistical classifier according to a portion of the training data serving as input and a corresponding ground truth label, and at least one unique cryptographic key of the plurality of cryptographic keys, wherein the adjustable classification parameters of each trained sub-classifier have unique values computed according to corresponding at least one unique cryptographic key, and providing the statistical classifier, wheType: ApplicationFiled: March 1, 2022Publication date: June 16, 2022Applicants: NEC Corporation Of America, Bar-Ilan University, NEC CorporationInventors: Jun FURUKAWA, Joseph KESHET, Kazuma OHARA, Toshinori ARAKI, Hikaru TSUCHIDA, Takuma AMADA, Kazuya KAKIZAKI, Shir AVIV-REUVEN
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Patent number: 11334353Abstract: A method for multiparty computation wherein a plurality of parties each compute a preset function without revealing inputs thereof to others, comprises: each of the parties performing a validation step to validate that computation of the function is carried out correctly, wherein the validation step includes: a first step that prepares a plurality of verified multiplication triples and feeds a multiplication triple to a second step when required; and the second step that consumes a randomly selected multiplication triple generated by the first step, wherein the first step performs shuffling of the generated multiplication triples, in at least one of shuffle in a sequence and shuffle of sequences.Type: GrantFiled: May 18, 2017Date of Patent: May 17, 2022Assignees: NEC CORPORATION, BAR-ILAN UNIVERSITYInventors: Toshinori Araki, Kazuma Ohara, Jun Furukawa, Lindell Yehuda, Nof Ariel
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Publication number: 20220141000Abstract: An information processing apparatus that performs bit embedding processing by four-party MPC using 2-out-of-4 replicated secret sharing stores a seed to generate a random number used when performing an operation concerning shares, generates, by using the seed, share reconstruction data for reconstructing a share used when performing bit embedding, and constructs a share for bit embedding by using at least the share reconstruction data.Type: ApplicationFiled: February 12, 2019Publication date: May 5, 2022Applicant: NEC CorporationInventors: Hikaru TSUCHIDA, Toshinori ARAKI, Kazuma OHARA, Takuma AMADA
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Publication number: 20220129567Abstract: There is provided an information processing apparatus that executes efficient type conversion processing in four-party computation using 2-out-of-4 replicated secret sharing. The information processing apparatus comprises a basic operation seed storage part, a reshare value computation part, and a share construction part. The basic operation seed storage part stores a seed for generating a random number used when computation is performed on a share. The reshare value computation part generates a random number using the seed, computes a share reshare value using the generated random number, and transmits data regarding the generated random number to other apparatuses. The share construction part constructs a share for type conversion using the data regarding the generated random number and the share reshare value received from other apparatuses.Type: ApplicationFiled: February 12, 2019Publication date: April 28, 2022Applicant: NEC CorporationInventors: Hikaru TSUCHIDA, Toshinori ARAKI, Kazuma OHARA, Takuma AMADA
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Patent number: 11315037Abstract: There is provided a system for computing a secure statistical classifier, comprising: at least one hardware processor executing a code for: accessing code instructions of an untrained statistical classifier, accessing a training dataset, accessing a plurality of cryptographic keys, creating a plurality of instances of the untrained statistical classifier, creating a plurality of trained sub-classifiers by training each of the plurality of instances of the untrained statistical classifier by iteratively adjusting adjustable classification parameters of the respective instance of the untrained statistical classifier according to a portion of the training data serving as input and a corresponding ground truth label, and at least one unique cryptographic key of the plurality of cryptographic keys, wherein the adjustable classification parameters of each trained sub-classifier have unique values computed according to corresponding at least one unique cryptographic key, and providing the statistical classifier, wheType: GrantFiled: March 14, 2019Date of Patent: April 26, 2022Assignees: NEC Corporation Of America, Bar-Ilan University, NEC CorporationInventors: Jun Furukawa, Joseph Keshet, Kazuma Ohara, Toshinori Araki, Hikaru Tsuchida, Takuma Amada, Kazuya Kakizaki, Shir Aviv-Reuven
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Patent number: 11290456Abstract: A random number generation server device includes a random number generation unit generating random numbers, a share addition unit generating secret shared data masked using random numbers and the secret shared data of operands in secret equality determination, a secret shared data generation unit generating secret shared data of inputted values, a secret shared data restoration unit obtaining the original values by restoring the secret shared data, and a determination bit-conjunction unit using the secret shared data to perform secret equality determination. A mask value restoration server device includes a secret shared data generation unit, a secret shared data restoration unit, and a determination bit-conjunction unit. A secure computation server device includes a secret shared data generation unit, a secret shared data restoration unit, and a determination bit-conjunction unit.Type: GrantFiled: December 5, 2017Date of Patent: March 29, 2022Assignee: NEC CORPORATIONInventors: Hikaru Tsuchida, Toshinori Araki, Kazuma Ohara
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Patent number: 11290265Abstract: A server device, a secret equality determination system, a secret equality determination method and a secret equality determination program recording medium are provided which, regardless of the server sharing scheme, can run with no difference in the number of communication rounds, whether carried out with a ring of order 2 or with a ring of an order greater than 2. This server device is provided with a secret shared data generation unit, a data storage unit, a mask unit, a random number share bit-conjunction unit, a random number share generation unit, a determination bit-conjunction unit and a secret shared data restoration unit. The secret shared data generation unit generates secret shared data. The data storage unit stores the secret shared data. The mask unit uses random number secret shared data to mask certain shared data. The random number share generation unit generates random number shares in which random numbers are secretly shared.Type: GrantFiled: December 5, 2017Date of Patent: March 29, 2022Assignee: NEC CORPORATIONInventors: Hikaru Tsuchida, Toshinori Araki, Kazuma Ohara
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Publication number: 20220092172Abstract: A verification apparatus acquires a source code for multiparty computation, while changing a combination of options settable to a multiparty computation compiler, compiles the source code for each combination of options to generate a plurality of multiparty computation executable codes, selects at least one multiparty computation executable code from the plurality of multiparty computation executable codes as a verification code and provides the at least one verification code to a verification environment of multiparty computation, generates an evaluation index with respect to an execution result of at least one verification code in the verification environment, and selects at least one recommended code from the plurality of multiparty computation executable codes, based on the evaluation index corresponding to at least one verification code and outputs the selected recommended code.Type: ApplicationFiled: January 9, 2019Publication date: March 24, 2022Applicant: NEC CorporationInventors: Hikaru TSUCHIDA, Takao TAKENOUCHI, Toshinori ARAKI, Kazuma OHARA, Takuma AMADA
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Patent number: 11273825Abstract: A vehicle control device includes a recognizer configured to recognize a surrounding situation of a vehicle and a driving controller configured to control acceleration, deceleration, and steering of the vehicle independently of an operation of an occupant of the vehicle on the basis of a recognition result of the recognizer. When it is recognized that the vehicle passes through a complex intersection where two or more intersections are combined by turning left or right at the complex intersection, the recognizer excludes at least a traffic signal closest to the vehicle among traffic signals present at positions capable of being visually recognized from the vehicle in a traveling direction of the vehicle from traffic signals whose states are required to be taken into account by the vehicle in a state in which the vehicle has entered the complex intersection.Type: GrantFiled: November 4, 2019Date of Patent: March 15, 2022Assignee: HONDA MOTOR CO., LTD.Inventors: Suguru Yanagihara, Takayasu Kumano, Takuya Niioka, Kazuma Ohara, Yuki Motegi