Patents by Inventor Kazumasa Shiga

Kazumasa Shiga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4354505
    Abstract: In a self-training biofeedback system, a physiological signal representing the state of relaxation of a person using the system is applied to a time counter to generate a binary count output representing the relaxation period. A visual indicator connected to the time counter provides the self trained person with a quick display of the measured time period so he can gauge the depth of his relaxation.
    Type: Grant
    Filed: September 3, 1980
    Date of Patent: October 19, 1982
    Assignee: Matsushita Electric Industrial Company, Limited
    Inventor: Kazumasa Shiga
  • Patent number: 4334545
    Abstract: Mental activity of a human subject is indicated with electrodes placed on the head of the subject to respond to brain activity. The electrodes derive a signal including low and high frequency a.c. components respectively having frequency ranges in the same low frequency range as alpha waves derived by the brain and considerably higher than the highest frequency of the alpha waves. The high and low frequency amplitude components are supplied to an indicator arranged so the mental state activity is indicated only in response to the detected high frequency component having an amplitude less than a level indicative of the subject not being in a state of relaxation and the detected low frequency component having an amplitude greater than a first predetermined value and less than a second predetermined value. The low frequency amplitude between the first and second predetermined values is associated with the alpha waves.
    Type: Grant
    Filed: November 28, 1979
    Date of Patent: June 15, 1982
    Assignee: Matsushita Electric Industrial Company, Limited
    Inventor: Kazumasa Shiga
  • Patent number: 4134150
    Abstract: Memory cells in a random access memory system are addressed through associated X and Y address lines. Each memory cell is operable as a static memory device to represent "1" binary data in response to a first control potential applied to the associated X address line and a first data input potential applied to the associated Y address line and further operable as a nonstatic memory device to represent "0" binary data in response to the first control potential applied to the X address line and to a second data input potential applied to the Y address line. Means are provided to refresh the stored "0" binary data by simultaneously applying a second control potential lower than the first control potential to all of the X address lines at periodic intervals and simultaneously therewith applying the second data input potential to all of the Y address lines.
    Type: Grant
    Filed: August 17, 1976
    Date of Patent: January 9, 1979
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Kazumasa Shiga