Patents by Inventor Kazumasa Ueda

Kazumasa Ueda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170326851
    Abstract: To provide an optical film having improved bending resistance while maintaining optical characteristics, e.g. transparency, total light transmittance, and YI value and so on. An optical film containing a resin and silica fine particles whose average primary particle size measured by image analysis with a scanning electron microscope is not less than 21 nm and not more than 40 nm, wherein the content of the silica fine particles is not less than 15% by mass and not more than 80% by mass based on a total content of the resin and the silica fine particles.
    Type: Application
    Filed: May 9, 2017
    Publication date: November 16, 2017
    Applicants: SUMITOMO CHEMICAL COMPANY, LIMITED, Industrial Technology Research Institute
    Inventors: Katsunori MOCHIZUKI, Kazumasa UEDA, Akiko KISHIDA, Tzong Ming LEE, Chyi Ming LEU, Chih Cheng LIN, Yung-Lung TSENG
  • Patent number: 8906158
    Abstract: Disclosed is a method for producing a compound semiconductor epitaxial substrate having a pn junction by selective growth which is characterized by using a base substrate having an average residual strain of not more than 1.0×10?5.
    Type: Grant
    Filed: August 23, 2005
    Date of Patent: December 9, 2014
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Kenji Kohiro, Kazumasa Ueda, Masahiko Hata
  • Patent number: 8691674
    Abstract: A method for producing a group 3-5 nitride semiconductor includes the steps of (i), (ii), (iii) in this order: (i) placing inorganic particles on a substrate, (ii) epitaxially growing a semiconductor layer by using the inorganic particles as a mask, and (iii) separating the substrate and the semiconductor layer by irradiating the interface between the substrate and the semiconductor layer with light; and a method for producing a light emitting device further includes adding electrodes.
    Type: Grant
    Filed: September 27, 2006
    Date of Patent: April 8, 2014
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Sadanori Yamanaka, Kazumasa Ueda, Yoshihiko Tsuchida
  • Patent number: 8169004
    Abstract: A compound semiconductor epitaxial substrate and a process for producing the same are provided. The compound semiconductor epitaxial substrate comprises a single crystal substrate, a lattice mismatch compound semiconductor layer and a stress compensation layer, wherein the lattice mismatch compound semiconductor layer and the stress compensation layer are disposed on the identical surface side of the single crystal substrate, there is no occurrence of lattice relaxation in the lattice mismatch compound semiconductor layer, as well as the stress compensation layer, and Ls representing the lattice constant of the single crystal substrate, Lm representing the lattice constant of the lattice mismatch compound semiconductor layer, and Lc representing the lattice constant of the stress compensation layer satisfy the formula (1a) or (1b).
    Type: Grant
    Filed: May 26, 2005
    Date of Patent: May 1, 2012
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Kenji Kohiro, Tomoyuki Takada, Kazumasa Ueda, Masahiko Hata
  • Patent number: 8097887
    Abstract: The present invention provides a light emitting device. The light emitting device has a light distribution in which a light distribution I (?, ?) obtained when light emitted from a chip of the light emitting device is directly measured is not dependent on a direction ? and is substantially represented by I (?, ?)=I (?). I (?, ?) represents a light intensity distribution in a direction (?, ?), ? represents an angle from a direction of a normal to a light extraction surface of the light emitting device (0???90°), ? represents a rotation angle around the normal (0???360°), and I (?) represents a monotone decreasing function with which 0 is approached when ?=90° is satisfied.
    Type: Grant
    Filed: March 27, 2007
    Date of Patent: January 17, 2012
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Sadanori Yamanaka, Yoshinobu Ono, Kazumasa Ueda
  • Patent number: 8097891
    Abstract: The present invention provides a group III nitride semiconductor light emitting device and a method for producing the same. The group III nitride semiconductor light emitting device comprises (a1), (b1) and (c1) in this order: (a1) an N electrode, (b1) a semiconductor multi-layer film, (c1) a transparent electric conductive oxide P electrode, wherein the semiconductor multi-layer film comprises an N-type semiconductor layer, light emitting layer, P-type semiconductor layer and high concentration N-type semiconductor layer having an n-type impurity concentration of 5×1018 cm?3 to 5×1020 cm?3 in this order, the N-type semiconductor layer is in contact with the N electrode, and the semiconductor multi-layer film has a convex.
    Type: Grant
    Filed: February 13, 2007
    Date of Patent: January 17, 2012
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Kenji Kasahara, Kazumasa Ueda, Yoshinobu Ono
  • Patent number: 7811839
    Abstract: The present invention provides a semiconductor light emitting device and a method for manufacturing the same. The semiconductor device comprises (i) a semiconductor layer with convex portions in a shape selected from a cone and a truncated cone and (ii) electrodes, wherein in the case of the convex portions with the shape of the truncated cone, the convex portions has a height of from 0.05 to 5.0 ?m and a bottom base diameter of from 0.05 to 2.0 ?m; in case of the convex portions with the shape of the cone, the convex portions has a height of from 0.05 to 5.0 ?m and a base diameter of from 0.05 to 2.0 ?m. A method for manufacturing a semiconductor light emitting device comprising the steps of (a) growing a semiconductor layer on a substrate, (b) forming on the semiconductor layer a region having particles with an average particle diameter of 0.
    Type: Grant
    Filed: February 16, 2006
    Date of Patent: October 12, 2010
    Assignee: Sumitomo Chemical Company, Ltd,
    Inventors: Kenji Kasahara, Kazumasa Ueda
  • Publication number: 20100155754
    Abstract: The present invention provides a group III nitride semiconductor light emitting device and a method for producing the same. The group III nitride semiconductor light emitting device comprises (a1), (b1) and (c1) in this order: (a1) an N electrode, (b1) a semiconductor multi-layer film, (c1) a transparent electric conductive oxide P electrode, wherein the semiconductor multi-layer film comprises an N-type semiconductor layer, light emitting layer, P-type semiconductor layer and high concentration N-type semiconductor layer having an n-type impurity concentration of 5×1018 cm?3 to 5×1020 cm?3 in this order, the N-type semiconductor layer is in contact with the N electrode, and the semiconductor multi-layer film has a convex.
    Type: Application
    Filed: February 13, 2007
    Publication date: June 24, 2010
    Applicant: SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Kenji Kasahara, Kazumasa Ueda, Yoshinobu Ono
  • Patent number: 7645625
    Abstract: The present invention provides a method for fine processing of a substrate, a method for fabrication of a substrate, and a light emitting device. In the method for fine processing of a substrate, after removing a single particle layer from the substrate having the single particle layer, a hole having an inner diameter smaller than a diameter of a particle and centering on a position on the substrate where each particle constructing the single particle layer has been placed is formed by etching.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: January 12, 2010
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Yoshinobu Ono, Kenji Kasahara, Kazumasa Ueda
  • Patent number: 7595259
    Abstract: A compound semiconductor substrate manufacturing method suitable for manufacturing a compound semiconductor element having high electrical characteristics. The compound semiconductor substrate manufacturing method is a method for manufacturing a compound semiconductor substrate having pn junction, including an epitaxial growing process, a selective growing process and other discretionary processes after the epitaxial growing process. The highest temperatures in the selective growing process and other discretionary processes after the epitaxial growing process are lower than that in the epitaxial growing process prior to the selective growing process.
    Type: Grant
    Filed: May 27, 2005
    Date of Patent: September 29, 2009
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Kenji Kohiro, Kazumasa Ueda, Masahiko Hata
  • Publication number: 20090236629
    Abstract: The present invention provides a substrate and a semiconductor light emitting device. Convexes having a curved surface are formed on the substrate. The semiconductor light emitting device comprises a substrate on which convexes having a curved surface are formed and a semiconductor layer on the substrate.
    Type: Application
    Filed: July 5, 2006
    Publication date: September 24, 2009
    Applicant: SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Naohiro Nishikawa, Kazumasa Ueda, Kenji Kasahara, Yoshihiko Tsuchida
  • Publication number: 20090117675
    Abstract: The present invention provides a method for producing a group 3-5 nitride semiconductor and a method for producing a light emitting device. The method for producing a group 3-5 nitride semiconductor, comprises the steps of (i), (ii), (iii) and (iv) in this order: (i) placing inorganic particles on a substrate, (ii) growing a semiconductor layer, and (iii) separating the substrate and the semiconductor layer by irradiating the interface between the substrate and the semiconductor layer with light.
    Type: Application
    Filed: September 27, 2006
    Publication date: May 7, 2009
    Applicant: SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Sadanori Yamanaka, Kazumasa Ueda, Yoshihiko Tsuchida
  • Publication number: 20090114944
    Abstract: The present invention provides a method for fine processing of a substrate, a method for fabrication of a substrate, and a light emitting device. In the method for fine processing of a substrate, after removing a single particle layer from the substrate having the single particle layer, a hole having an inner diameter smaller than a diameter of a particle and centering on a position on the substrate where each particle constructing the single particle layer has been placed is formed by etching.
    Type: Application
    Filed: March 30, 2007
    Publication date: May 7, 2009
    Applicant: Sumitomo Chemical Company , Limited
    Inventors: Yoshinobu Ono, Kenji Kasahara, Kazumasa Ueda
  • Publication number: 20090093122
    Abstract: The present invention provides a method for producing a group III-V nitride semiconductor substrate. The method for producing a group III-V nitride semiconductor substrate comprises the steps of (I-1) to (I-6): (I-1) placing inorganic particles on a template, (I-2) dry-etching the template by using the inorganic particles as an etching mask, to form convexes on the template, (I-3) forming a coating film for an epitaxial growth mask on the template, (I-4) removing the inorganic particles to form an exposed surface of the template, (I-5) growing a group III-V nitride semiconductor on the exposed surface of the template, and (I-6) separating the group III-V nitride semiconductor from the template.
    Type: Application
    Filed: March 8, 2007
    Publication date: April 9, 2009
    Applicant: SUMITOMO CHEMICAL COMPANY LIMITED
    Inventors: Kazumasa Ueda, Naohiro Nishikawa, Kenji Kasahara
  • Publication number: 20090031944
    Abstract: Disclosed is a method for producing a compound semiconductor epitaxial substrate having a pn junction by selective growth which is characterized by using a base substrate having an average residual strain of not more than 1.0×10?5.
    Type: Application
    Filed: August 23, 2005
    Publication date: February 5, 2009
    Inventors: Kenji Kohiro, Kazumasa Ueda, Masahiko Hata
  • Publication number: 20090008652
    Abstract: The present invention provides a free-standing substrate, a method for producing the same and a semiconductor light-emitting device. The free-standing substrate comprises a semiconductor layer and inorganic particles, wherein the inorganic particles are included in the semiconductor layer. The method for producing a free-standing substrate comprises the steps of: (a) placing inorganic particles on a substrate, (b) growing a semiconductor layer thereon, and (c) separating the semiconductor layer from the substrate, in that order. The semiconductor light-emitting device comprises the free-standing substrate, a conductive layer, a light-emitting device, and electrodes.
    Type: Application
    Filed: March 20, 2006
    Publication date: January 8, 2009
    Applicant: Sumitomo Chemical Company, Ltd.
    Inventors: Kazumasa Ueda, Naohiro Nishikawa, Yoshihiko Tsuchida
  • Publication number: 20080149952
    Abstract: The present invention provides a semiconductor light emitting device and a method for manufacturing the same. The semiconductor device comprises (i) a semiconductor layer with convex portions in a shape selected from a cone and a truncated cone and (ii) electrodes, wherein in the case of the convex portions with the shape of the truncated cone, the convex portions has a height of from 0.05 to 5.0 ?m and a bottom base diameter of from 0.05 to 2.0 ?m; in case of the convex portions with the shape of the cone, the convex portions has a height of from 0.05 to 5.0 ?m and a base diameter of from 0.05 to 2.0 ?m. A method for manufacturing a semiconductor light emitting device comprising the steps of (a) growing a semiconductor layer on a substrate, (b) forming on the semiconductor layer a region having particles with an average particle diameter of 0.
    Type: Application
    Filed: February 16, 2006
    Publication date: June 26, 2008
    Applicant: Sumitomo Chemical Comapan, Limited
    Inventors: Kenji Kasahara, Kazumasa Ueda
  • Publication number: 20080087881
    Abstract: The present invention provides a semiconductor multilayer substrate used as a high-brightness semiconductor light-emitting device, a method for producing the same, and a light-emitting device. The semiconductor multilayer substrate comprises a semiconductor layer containing an inorganic particle made of substance other than metal nitrides. The method for producing a semiconductor multilayer substrate comprises the steps (a) and (b) of: (a) placing an inorganic particle made of substance other than metal nitrides on a substrate and (b) growing a semiconductor layer.
    Type: Application
    Filed: November 22, 2005
    Publication date: April 17, 2008
    Inventors: Kazumasa Ueda, Naohiro Nishikawa
  • Publication number: 20070232018
    Abstract: A compound semiconductor substrate manufacturing method suitable for manufacturing a compound semiconductor element having high electrical characteristics. The compound semiconductor substrate manufacturing method is a method for manufacturing a compound semiconductor substrate having pn junction, including an epitaxial growing process, a selective growing process and other discretionary processes after the epitaxial growing process. The highest temperatures in the selective growing process and other discretionary processes after the epitaxial growing process are lower than that in the epitaxial growing process prior to the selective growing process.
    Type: Application
    Filed: May 27, 2005
    Publication date: October 4, 2007
    Inventors: Kenji Kohiro, Kazumasa Ueda, Masahiko Hata
  • Publication number: 20070215905
    Abstract: A compound semiconductor epitaxial substrate and a process for producing the same are provided. The compound semiconductor epitaxial substrate comprises a single crystal substrate, a lattice mismatch compound semiconductor layer and a stress compensation layer, wherein the lattice mismatch compound semiconductor layer and the stress compensation layer are disposed on the identical surface side of the single crystal substrate, there is no occurrence of lattice relaxation in the lattice mismatch compound semiconductor layer, as well as the stress compensation layer, and Ls representing the lattice constant of the single crystal substrate, Lm representing the lattice constant of the lattice mismatch compound semiconductor layer, and Lc representing the lattice constant of the stress compensation layer satisfy the formula (1a) or (1b).
    Type: Application
    Filed: May 26, 2005
    Publication date: September 20, 2007
    Inventors: Kenji Kohiro, Tomoyuki Takada, Kazumasa Ueda, Masahiko Hata