Abstract: The present invention provides an AC memory type plasma display panel comprising a pair of substrates and stacked together via a sealing member so as to have a discharge space therebetween, and discharge electrodes and a dielectric layer covering the discharge electrodes formed on at least one of the substrates. The dielectric layer is formed on the surface of the substrate including a display region and a portion outside the display region in which the sealing member is located. The thickness of the portion for bonding of the sealing member outside the display region is smaller than the thickness of the portion corresponding to the display region.

Abstract: The present invention provides an AC memory type plasma display panel comprising a pair of substrates and stacked together via a sealing member so as to have a discharge space therebetween, and discharge electrodes and a dielectric layer covering the discharge space therebetween, and discharge electrodes and a dielectric layer covering the discharge electrodes formed on at least one of the substrates. The dielectric layer is formed on the surface of the substrate including a display region and a portion outside the display region in which the sealing member is located. The thickness of the portion for bonding of the sealing member outside the display region is smaller than the thickness of the portion corresponding to the display region.

Abstract: The present invention provides an AC memory type plasma display panel comprising a pair of substrates and stacked together via a sealing member so as to have a discharge space therebetween, and discharge electrodes and a dielectric layer covering the discharge space therebetween, and discharge electrodes and a dielectric layer covering the discharge electrodes formed on at least one of the substrates. The dielectric layer is formed on the surface of the substrate including a display region and a portion outside the display region in which the sealing member is located. The thickness of the portion for bonding of the sealing member outside the display region is smaller than the thickness of the portion corresponding to the display region.

Abstract: It is an object of the present invention to prevent deterioration of a transparent electrically-conductive film which forms display electrodes, so as to enhance the reliability of display electrodes. In an AC type plasma display panel including a plurality of display electrodes X & Y formed of a transparent electrically-conductive film or a multiple layer of a transparent electrically-conductive film plus a metal film a width of which is narrower therethan, and a dielectric layer to cover the display electrodes from the discharge space, the dielectric layer is formed by the use of a ZnO-containing glass material containing substantially none of lead. Moreover, the display electrodes are protected by coating the dielectric layer so far as the ends of display electrodes; and the coating is removed afterwards by etching, etc.

Abstract: Process for manufacturing a leadframe that is adapted to enhance the adhesion between a stage 1 and a sealing resin without decreasing the bonding strength between the stage 1 and a chip 4; and a semiconductor device constructed by using such a leadframe. The leadframe comprises a body 1 constructed from at least two kinds of layer members, 11, 12, and 13, formed from different materials and laminated one on top of the other; the materials for the layer members 11, 12, and 13 being chosen to have different etching rates. Hollow spaces 15 are formed inside the layer member having the greatest etching rate of all the layer members.

Abstract: A lead frame body having a chip mounting surface comprises first, second and third successive, laminated layers each having lower and upper surface, the lower main surface of the first layer defining a bottom main surface of the lead frame body and the upper main surface of the third layer defining the chip-mounting surface of the lead frame body. The first, second and third layers are formed of respective, different materials, the material of the second layer having a higher etching rate than the respective etching rate of the materials of the first and third layers. A plurality of spaced openings are formed in the first layer and which respectively correspond to and are in communication with a corresponding plurality of spaced hollow cavities in the second layer.