Patents by Inventor Kazumi Inou

Kazumi Inou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device and method of manufacturing the same
    Patent number: 5637909
    Abstract: A bipolar transistor is formed on a silicon substrate having a silicon oxide film. An n-silicon layer having a top surface of a (100) plane is formed on the silicon oxide film and is used as a collector layer. An end face constituted by a (111) plane is formed on the end portion of the collector layer by etching, using an aqueous KOH solution. A B-doped p-silicon layer is formed on the end face by epitaxial growth and is used as a base layer. Furthermore, an As-doped n-silicon layer is formed on the base layer and is used as an emitter layer. Electrodes are respectively connected to the collector, base, and emitter layers.
    Type: Grant
    Filed: January 2, 1996
    Date of Patent: June 10, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroomi Nakajima, Yasuhiro Katsumata, Hiroshi Iwai, Toshihiko Iinuma, Kazumi Inou, Mitsuhiko Kitagawa, Kouhei Morizuka, Akio Nakagawa, Ichiro Omura
  • Semiconductor device and manufacturing method thereof
    Patent number: 5604374
    Abstract: A semiconductor device comprises a semiconductor substrate having a main surface, a first semiconductor region of a first conductive type, formed on the main surface of the semiconductor substrate, a surrounding of the first semiconductor region is buried with a first insulation film, a second semiconductor region of a second conductive type, formed on the first insulation film and the first semiconductor region, a second insulation film, formed on the second semiconductor region, an end portion of the second insulation film is positioned above the first insulation film, and having an opening at a central portion thereof to be positioned above the first semiconductor region, and a third semiconductor region of a first conductivity type formed on a surface of the second semiconductor region exposed through the opening of the second insulation film.
    Type: Grant
    Filed: March 7, 1995
    Date of Patent: February 18, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazumi Inou, Yasuhiro Katsumata
  • Semiconductor device and method of manufacturing the same
    Patent number: 5510647
    Abstract: A bipolar transistor is formed on a silicon substrate having a silicon oxide film. An n-silicon layer having a top surface of a (100) plane is formed on the silicon oxide film and is used as a collector layer. An end face constituted by a (111) plane is formed on the end portion of the collector layer by etching, using an aqueous KOH solution. A B-doped p-silicon layer is formed on the end face by epitaxial growth and is used as a base layer. Furthermore, an As-doped n-silicon layer is formed on the base layer and is used as an emitter layer. Electrodes are respectively connected to the collector, base, and emitter layers.
    Type: Grant
    Filed: March 15, 1994
    Date of Patent: April 23, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroomi Nakajima, Yasuhiro Katsumata, Hiroshi Iwai, Toshihiko Iinuma, Kazumi Inou, Mitsuhiko Kitagawa, Kouhei Morizuka, Akio Nakagawa, Ichiro Omura