Abstract: Provided is a heater power control circuit which switches on/off a voltage signal supplied from a direct-current power source to control a power of a heater by controlling a voltage applied to the heater. The heater power control circuit includes a voltage smoothing circuit that is disposed between the heater and a switching circuit which switches on/off a voltage supplied from the direct-current power source. The voltage smoothing circuit converts the voltage into an analog voltage signal by smoothing a voltage signal obtained by switching on/off the voltage.

Abstract: Provided is a heater power control circuit which switches on/off a voltage signal supplied from a direct-current power source to control a power of a heater by controlling a voltage applied to the heater. The heater power control circuit includes a voltage smoothing circuit that is disposed between the heater and a switching circuit which switches on/off a voltage supplied from the direct-current power source. The voltage smoothing circuit converts the voltage into an analog voltage signal by smoothing a voltage signal obtained by switching on/off the voltage.

Abstract: A method of detecting an abnormality in a burn-in apparatus, which brings a heater and a temperature sensor into contact with various devices under test during a burn-in test and controls power consumption of the heater to adjust levels of temperature of the devices under test, wherein the temperature sensor detects temperature of a temperature control block in which the heater and the temperature sensor are arranged and with which a cooling liquid is in contact while the devices under test are not in contact with the heater and the temperature sensor, and the temperature sensor is diagnosed to be normal or not based on a result of detection.

Abstract: A burn-in system enabling the temperatures of a large number of electronic devices differing in amount of self generated heat to be simultaneously reliably adjusted to a predetermined temperature, that is, a burn-in system bringing heater blocks having heaters, cooling blocks formed with channels able to carry a coolant, and sensor blocks having temperature sensors into contact with a plurality of DUTs mounted on a burn-in board and simultaneously performing a burn-in test on the plurality of DUTs, wherein each cooling block is formed with a first accommodating space and second accommodating space, each heater block is accommodated in a first accommodating space in a state maintaining clearance from the inside wall surfaces, and each sensor block is accommodated in a second accommodating space in a state maintaining clearance from the inside wall surfaces.

Abstract: A burn-in system enabling the temperatures of a large number of electronic devices differing in amount of self generated heat to be simultaneously reliably adjusted to a predetermined temperature, that is, a burn-in system bringing heater blocks having heaters, cooling blocks formed with channels able to carry a coolant, and sensor blocks having temperature sensors into contact with a plurality of DUTs mounted on a burn-in board and simultaneously performing a burn-in test on the plurality of DUTs, wherein each cooling block is formed with a first accommodating space and second accommodating space, each heater block is accommodated in a first accommodating space in a state maintaining clearance from the inside wall surfaces, and each sensor block is accommodated in a second accommodating space in a state maintaining clearance from the inside wall surfaces.

Abstract: A method of monitoring a burn-in apparatus, which brings a heater and a temperature sensor into contact with various devices under test during a burn-in test and controls power consumption of the heater to adjust levels of temperature of the devices under test, wherein the temperature sensor detects temperature of a temperature control block in which the heater and the temperature sensor are arranged and with which a cooling liquid is in contact while the devices under test are not in contact with the heater and the temperature sensor, and the temperature sensor is diagnosed to be normal or not based on a result of detection.

Abstract: A burn-in system enabling the temperatures of a large number of electronic devices differing in amount of self generated heat to be simultaneously reliably adjusted to a predetermined temperature, that is, a burn-in system bringing heater blocks having heaters, cooling blocks formed with channels able to carry a coolant, and sensor blocks having temperature sensors into contact with a plurality of DUTs mounted on a burn-in board and simultaneously performing a burn-in test on the plurality of DUTs, wherein each cooling block is formed with a first accommodating space and second accommodating space, each heater block is accommodated in a first accommodating space in a state maintaining clearance from the inside wall surfaces, and each sensor block is accommodated in a second accommodating space in a state maintaining clearance from the inside wall surfaces.

Abstract: A burn-in system enabling the temperatures of a large number of electronic devices differing in amount of self generated heat to be simultaneously reliably adjusted to a predetermined temperature, that is, a burn-in system bringing heater blocks having heaters, cooling blocks formed with channels able to carry a coolant, and sensor blocks having temperature sensors into contact with a plurality of DUTs mounted on a burn-in board and simultaneously performing a burn-in test on the plurality of DUTs, wherein each cooling block is formed with a first accommodating space and second accommodating space, each heater block is accommodated in a first accommodating space in a state maintaining clearance from the inside wall surfaces, and each sensor block is accommodated in a second accommodating space in a state maintaining clearance from the inside wall surfaces.

Abstract: A burn-in system enabling the temperatures of a large number of electronic devices differing in amount of self generated heat to be simultaneously reliably adjusted to a predetermined temperature, that is, a burn-in system bringing heater blocks having heaters, cooling blocks formed with channels able to carry a coolant, and sensor blocks having temperature sensors into contact with a plurality of DUTs mounted on a burn-in board and simultaneously performing a burn-in test on the plurality of DUTs, wherein each cooling block is formed with a first accommodating space and second accommodating space, each heater block is accommodated in a first accommodating space in a state maintaining clearance from the inside wall surfaces, and each sensor block is accommodated in a second accommodating space in a state maintaining clearance from the inside wall surfaces.

Abstract: In a variable delay circuit calibrating method in which the state of connection of M delay stages connected in cascade through multiplexers and weighted differently is controlled by a control signal value to generate a calibrated amount of delay corresponding to a nominal amount of delay D.sub.s which varies in a predetermined minimum nominal delay step d.sub.s, the method comprises the steps of: dividing an amount of delay D.sub.i measured for each given control signal value CC.sub.i by the minimum nominal delay step d.sub.s of a variable delay circuit; calculating first and second errors, R.sub.k =D.sub.i -d.sub.s k and R.sub.k+1 =d.sub.s -R.sub.k, between the value k of an integral part of the resulting quotient and two adjoining nominal amounts of delay D.sub.sk and D.sub.sk+1 ; making a check to determine if the first error R.sub.k is smaller than an error held in a k-th row of a calibration table in correspondence with a nominal set signal value CS=k; if so, writing the first error R.sub.

Abstract: A test data pattern, an address pattern, and a control signal are supplied from a pattern generator to a test memory. Data read from the test memory is compared with expected data by an XOR gate. When they match, a compared result that represents pass is output. When they mismatch, a compared result that represents fail is output. A match signal WC detected by the XOR gate is held in a register. The register outputs an inhibition signal to an inhibition gate of the test memory. Thus, a write enable signal WE is inhibited from being supplied to the test memory. In addition, the inhibition signal is supplied to a compared result inhibition gate. The compared result inhibition gate causes the compared result to be passed and prevents the test memory from being excessively written.