Abstract: A region being free of groove is provided in a central portion of the polishing pad, and a region having grooves formed thereon is provided the outer portion thereof. A retainer ring surrounds and sustains a circumference portion of the wafer, and a part of the portion that tends to provide higher polishing rate, which is adjacent to the retainer ring in the circumference portion, is disposed so as to face against the region being free of the groove. Then, while pressing the wafer against the polishing pad, the wafer and the polishing pad are rotated in the same direction. Then, the slurry is supplied from a slurry feeding unit to the outer portion of the region being free of groove. Since substantially no slurry is supplied in the region being free of groove, the polishing rate is reduced there, and thus the uniform polishing rate of over the entire wafer is provided.

Abstract: A region free of groove is provided in a central portion of a polishing pad, and a region having grooves formed thereon is provided on the outer portion thereof. A retainer ring surrounds and sustains a circumference portion of the wafer, and a part that tends to provide higher polishing rate, which is adjacent to the retainer ring in the circumference portion, is disposed so as to face against the region free of the groove. Then, while pressing the wafer against the polishing pad, these are rotated in the same direction. Then, a slurry is supplied from a slurry feeding unit to the outer portion of the region free of groove. Since substantially no slurry is supplied in the region free of groove, the polishing rate is reduced there, and thus a uniform polishing rate over the entire wafer is provided.

Abstract: A method for forming wiring composed of copper materials by using a CVD method by which the number of processes is reduced and copper metal wiring is effectively formed. After a first copper thin film having a film thickness adjusted so as not to virtually cause bumps and dips attributable to crystal particles on a surface of the film is formed by using the CVD method, with a barrier metal film put between the first copper thin film and the insulating film, on the insulating film covering the semiconductor substrate and containing the connecting trench, reflow processing is performed to make flowing the surface of the copper thin film. Then, after the second copper thin film having a sufficient film thickness to impart a wiring function obtained in a short time by using the sputtering method is formed on the first copper thin film, planarization is carried out on the surface by the CMP method to form copper wiring.

Abstract: First, a lower layer wiring is formed on a semiconductor substrate. Then, an interlayer insulating film is formed on the lower layer wiring. Next, a first Ti film is formed on the interlayer insulating film. Thereafter, a TiN film is formed on the first Ti film. Then, a via hole is formed in the TiN film, the first Ti film and the interlayer insulating film such as to reach the lower layer wiring. Then, a second Ti film and an Al or Al alloy film are sequentially formed in the via hole and on the TiN film. Next, a thermal treatment is carried out, thereby allowing Ti in the second Ti film and Al in the Al or Al alloy film to react with each other in a bottom of the via hole.

Abstract: First, a lower layer wiring is formed on a semiconductor substrate. Then, an interlayer insulating film is formed on the lower layer wiring. Next, a first Ti film is formed on the interlayer insulating film. Thereafter, a TiN film is formed on the first Ti film. Then, a via hole is formed in the TiN film, the first Ti film and the interlayer insulating film such as to reach the lower layer wiring. Then, a second Ti film and an Al or Al alloy film are sequentially formed in the via hole and on the TiN film. Next, a thermal treatment is carried out, thereby allowing Ti in the second Ti film and Al in the Al or Al alloy film to react with each other in a bottom of the via hole.

Abstract: A sample is rotated about an axis perpendicular to a surface of the sample in predetermined angular steps. The surface of the sample is irradiated with linearly polarized light, and a reflected intensity of light reflected from the surface of the sample is detected in each angular step. Based on a rotational angle dependency of the reflected intensity, the crystal face orientation of the sample is determined. To improve signal-to-noise ratio, the crystal lattice of the sample is excited. Further, the surface of the sample is irradiated with a plurality of linearly polarized light beams to obtain a plurality of reflected intensities.

Abstract: A manufacturing method of a semiconductor device which includes wiring dense part and wiring isolated part enables occurrence of ‘Erosion’ to be prevented, as well as it is capable of being prevented occurrence of ‘micro-scratch’ on surface of oxide layer. The manufacturing method sets a plurality of trench-parts on insulation layer, before forming metal plating layer consisting of copper so as to embed trench-parts. Manufacturing process implements annealing in such a way that grain-size of the metal plating layer in the wiring dense part becomes smaller than the grain-size in the wiring isolated part. The annealing, for instance, is implemented with substrate temperature of 70 to 200° C. Subsequently, the manufacturing step perfects the semiconductor device while polishing the metal plating layer to cause the surface of the substrate to be flat.

Abstract: Disclosed herein is a method for forming an embedded metal wiring comprising the steps of: forming a wiring trench, a barrier metal film and a conductive metal film; exposing the barrier metal film by polishing the conductive metal film by use of a polishing liquid and an oxidizing agent having a first concentration; and forming a wiring by polishing and removing the exposed barrier metal film by use of a polishing liquid and an oxidizing agent having a second concentration lower than the first concentration. The excessive polishing of the conductive metal occurs when an oxidizing agent having a relatively large concentration while such an oxidizing agent is needed when the barrier metal film is polished and removed. In order to attain the smooth removal of the barrier metal film and to prevent the excessive removal of the conductive metal, the oxidizing agent having a lower concentration is employed in the polishing of the conductive metal.

Abstract: A buried wiring line is formed without dishing using damascene and chemical mechanical polishing (CMP) processes. A key feature is the use of a first and a second pressure unit. The first pressure unit (15) has an airbag (18). The bag (18) is large in elastic deformation, and used to urge a copper film (5) of a silicon substrate (1) against a polishing pad (12) onto which a polishing liquid is supplied while the pad (12) is rotated, so that the copper film (5) is polished. The copper film (5) has been formed on the surface of the silicon substrate (1) through a barrier metal film (4). After polishing of the copper film (5), the silicon substrate (1) is transferred to the second pressure unit (25). The unit (25) has a metal plate (20).

Abstract: A slurry supply apparatus includes a slurry supply tank, CMP unit, ultrasonic dispersion unit, and filter. In the slurry supply tank, a slurry obtained by dispersing abrasive grains with a predetermined grain size in a chemical solution is agitated and stored. The slurry is supplied from the slurry supply tank to the CMP unit through a slurry supply line. The ultrasonic dispersion unit pulverizes the abrasive grains formed by cohesion and supplied from the slurry supply tank through the slurry supply tank. The filter removes an abrasive grain with the predetermined grain size or less, which is supplied from the ultrasonic dispersion unit and supplies the resultant slurry to the CMP unit. A slurry supply method is also disclosed.

Abstract: A sample is rotated about an axis perpendicular to a surface of the sample in predetermined angular steps. The surface of the sample is irradiated with linearly polarized light, and a reflected intensity of light reflected from the surface of the sample is detected in each angular step. Based on a rotational angle dependency of the reflected intensity, the crystal face orientation of the sample is determined. To improve signal-to-noise ratio, the crystal lattice of the sample is excited. Further, the surface of the sample is irradiated with a plurality of linearly polarized light beams to obtain a plurality of reflected intensities.

Abstract: In a process for manufacturing a semiconductor device where a plurality of wafers are formed on a single wafer, comprising the steps of forming a groove pattern in an insulating layer on a wafer; forming a seed metal layer in the groove by spattering; depositing an interconnection metal layer on the seed metal layer by electrolytic plating; and then flattering the wafer to the surface of the insulating layer, during forming the groove pattern in the insulating layer, the groove pattern is formed in the area on the wafer where devices can be taken while forming a dummy pattern up to 30 &mgr;m long in the wafer periphery where devices cannot be taken, to prevent the interconnection metal layer from being peeled in the wafer periphery.

Abstract: In a process for manufacturing a semiconductor device where a plurality of wafers are formed on a single wafer, comprising the steps of forming a groove pattern in an insulating layer on a wafer; forming a seed metal layer in the groove by spattering; depositing an interconnection metal layer on the seed metal layer by electrolytic plating; and then flattering the wafer to the surface of the insulating layer, during forming the groove pattern in the insulating layer, the groove pattern is formed in the area on the wafer where devices can be taken while forming a dummy pattern up to 30 &mgr;m long in the wafer periphery where devices cannot be taken, to prevent the interconnection metal layer from being peeled in the wafer periphery.

Abstract: A solid thin film is formed from a layer of liquid material in such a manner as to fill a contact hole formed in a semiconductor structure; a semiconductor structure is firstly cooled rather than ambience, thereafter, liquid material is spread over the semiconductor structure, then the layer of liquid material is pressed so that the liquid material perfectly fills the contact hole, and, finally, the layer of liquid material is heated so as to form a solid layer from the layer of liquid material.

Abstract: A method for forming metal thin films for wiring wherein the formation of the metal films by chemical vapor deposition technique is carried out in two steps, with the deposition temperature of the second step being set to be higher than the deposition temperature of the first step, whereby a via hole or a wiring groove can be embedded without the formation of voids. As a result a highly reliable wiring can be achieved even on a fine LSI.

Abstract: A semiconductor device manufacturing method comprises the steps of depositing a first insulation coating on a substrate, forming a wiring groove on the first insulation coating, depositing aluminum or its alloy on the wiring groove, eliminating the aluminum or its alloy deposited over the other portion than the wiring groove, depositing a second insulation coating doped with at least B or P on the substrate, depositing a third insulation coating on the second insulation coating, applying a photoresist on the third insulation coating, and exposing the photoresist to a light of short wavelength.

Abstract: A method of forming an aluminum-based layer mainly including aluminum on a surface of an insulating layer and within a hole formed in the insulating layer. The method includes the steps of: carrying out a chemical vapor deposition to deposit the aluminum-based layer on the surface of the insulating layer and also to incompletely fill the hole to not less than 75% by volume of the hole by use of a source including at least one of alkyl groups and hydrogen so that a surface of the aluminum-based layer is terminated by the at least one of alkyl groups and hydrogen included in the source, and so that the surface of the aluminum-based layer is free of any natural oxide film; and carrying out a heat treatment, without formation of any natural oxide film on the surface of the aluminum-based layer, for causing a re-flow of the aluminum-based layer, whereby the at least one of alkyl groups and hydrogen promotes a migration of aluminum atoms on the surface of the aluminum-based layer.

Abstract: A process for producing a semiconductor device having an interlayer insulating film of low dielectric constant and interconnects of low resistance and operable at a high speed, which comprises:a step of heat-treating a semiconductor substrate having a lower interconnect,a step of depositing, on the heat-treated semiconductor substrate, an insulating film having a dielectric constant of 3.5 or less,a step of making holes in the insulating film, anda step of growing a metal only in the holes by selective chemical vapor deposition.

Abstract: In a method of manufacturing semiconductor device, an aluminum film and a barrier metal film are formed on a semiconductor substrate and then an interlayer insulation film 15 is formed over the aluminum film and the barrier metal film. Then a PVD-Al film is formed over the entire upper surface of the interlayer insulation film by PVD, whereupon the PVD-Al film the interlayer insulation film are etched to open via holes, exposing part of the upper surface of the barrier metal film. Subsequently, via plugs are formed by filling metal, which includes aluminum, in the via holes by selective CVD with masking by a native oxide film formed on the upper surface of the PVD-Al film whereupon the native oxide film is removed by etching. Then a CVD-Al is formed over the entire upper surface of the PVD-Al film and the via plugs by CVD.

Abstract: A solid thin film is formed from a layer of liquid material in such a manner as to fill a contact hole formed in a semiconductor structure; a semiconductor structure is firstly cooled rather than ambience, thereafter, liquid material is spread over the semiconductor structure, then the layer of liquid material is pressed so that the liquid material perfectly fills the contact hole, and, finally, the layer of liquid material is heated so as to form a solid layer from the layer of liquid material.