Patents by Inventor Kazumi Tsuchida

Kazumi Tsuchida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Antibody against advanced glycation end products and use thereof
    Patent number: 12006358
    Abstract: The present invention is directed to providing a monoclonal antibody having high selectivity and affinity for AGEs, particularly, AGEs derived from glyceraldehyde or AGEs derived from glycolaldehyde, and an analysis method utilizing the same. Another object of the present invention is to provide methods for diagnosing, treating and preventing a disease using the monoclonal antibody.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: June 11, 2024
    Assignee: BLOOM TECHNOLOGY CORPORATION
    Inventors: Tetsuro Yamamoto, Shota Tsuchida, Tomoaki Shigeta, Kazumi Sasamoto, Mami Chirifu
  • Process for removal of residues remaining after etching polysilicon layer in formation of integrated circuit structure
    Patent number: 5296093
    Abstract: The invention comprises an improvement in the process wherein a polysilicon layer, which is formed over a step on an integrated circuit structure and masked with a photoresist, is anisotropically etched to remove the exposed portions of the polysilicon layer leaving sidewall residues of a polymerized silicon/oxide-containing material adjacent the polysilicon lines. The improvement comprises treating the integrated circuit substrate with an aqueous ammonium-containing base/peroxide solution to remove the residues of polymerized silicon/oxide-containing material, without undercutting the remaining polysilicon.
    Type: Grant
    Filed: May 27, 1992
    Date of Patent: March 22, 1994
    Assignees: Applied Materials, Inc., Seiko Epson Corp.
    Inventors: Chester Szwejkowski, Ian S. Latchford, Isamu Namose, Kazumi Tsuchida
  • Process for removal of residues remaining after etching polysilicon layer in formation of integrated circuit structure
    Patent number: 5147499
    Abstract: The invention comprises an improvement in the process wherein a polysilicon layer, which is formed over a step on an integrated circuit structure and masked with a photoresist, is anisotropically etched to remove the exposed portions of the polysilicon layer leaving sidewall residues of a polymerized silicon/oxide-containing material adjacent the polysilicon lines. The improvement comprises treating the integrated circuit substrate with an aqueous hydroxide/peroxide solution to remove the residues of polymerized silicon/oxide-containing material, without undercutting the remaining polysilicon.
    Type: Grant
    Filed: July 24, 1991
    Date of Patent: September 15, 1992
    Assignee: Applied Materials, Inc.
    Inventors: Chester Szwejkowski, Ian S. Latchford, Isamu Namose, Kazumi Tsuchida