Patents by Inventor Kazumitsu Seki
Kazumitsu Seki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8304872Abstract: A lead frame includes a lead frame body 21 having a die pad 24 to which a semiconductor chip 12 is bonded and a plurality of leads 25 arranged around the die pad 24 and made of Cu or an alloy containing Cu, and a metallic film formed on the lead frame body 21 and to connected to a metallic wire 15 connected to the electrode pad 36 of the semiconductor chip 12. The metallic film is an Ag-plated film 22 with nanoparticles 34 arranged in gaps 33 among Ag crystal grains 31.Type: GrantFiled: November 25, 2009Date of Patent: November 6, 2012Assignee: Shinko Electric Industries Co., Ltd.Inventors: Kazumitsu Seki, Muneaki Kure, Akemi Nozaki
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Patent number: 8283759Abstract: A lead frame base is coated with a four-layer plating. The four-layer plating includes an underlayer plating (Ni), a palladium plating, a silver plating and a gold plating arranged in this order from bottom to top.Type: GrantFiled: October 19, 2006Date of Patent: October 9, 2012Assignees: Panasonic Corporation, Shinko Electric Industries Co., Ltd.Inventors: Seishi Oida, Takahiro Nakano, Yoshito Miyahara, Takashi Yoshie, Harunobu Satou, Kouichi Kadosaki, Kazumitsu Seki
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Publication number: 20100127369Abstract: A lead frame includes a lead frame body 21 having a die pad 24 to which a semiconductor chip 12 is bonded and a plurality of leads 25 arranged around the die pad 24 and made of Cu or an alloy containing Cu, and a metallic film formed on the lead frame body 21 and to connected to a metallic wire 15 connected to the electrode pad 36 of the semiconductor chip 12. The metallic film is an Ag-plated film 22 with nanoparticles 34 arranged in gaps 33 among Ag crystal grains 31.Type: ApplicationFiled: November 25, 2009Publication date: May 27, 2010Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Kazumitsu Seki, Muneaki Kure, Akemi Nozaki
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Patent number: 7524702Abstract: A conductor substrate for mounting a semiconductor element, at least a portion thereof mounting the semiconductor element being sealed with an insulating resin, wherein an uppermost surface layer of the conductor substrate comprises copper or an alloy thereof, and the conductor substrate is partly or entirely covered with a layer of copper oxide containing a hydroxide formed upon the surface treatment of the conductor substrate and a process of producing the conductor substrate as well as a process for the production of a semiconductor device using the conductor substrate.Type: GrantFiled: December 4, 2006Date of Patent: April 28, 2009Assignee: Shinko Electric Industries Co., Ltd.Inventors: Kazumitsu Seki, Yoshihito Miyahara, Muneaki Kure
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Patent number: 7408248Abstract: A lead frame for semiconductor device is provided with an inner lead part and an outer lead part. A composite plating layer is provided on the entire plane of a base material constituting the lead frame or at least on the outer lead part. The composite plating layer includes a base layer composed of an Ni-based plating layer formed on the entire plane of the base material constituting the lead frame or at least on the outer lead part, a Pd or Pd alloy plating layer formed on an upper plane of the base layer with a thickness of 0.005-0.01 ?m, and an Au plating layer formed on an upper plane of the Pd or Pd alloy plating layer with a thickness of 0.02-0.1 ?m. The lead frame for semiconductor device has a Pd-PPF structure.Type: GrantFiled: April 19, 2005Date of Patent: August 5, 2008Assignee: Shinko Electric Industries Co., Ltd.Inventors: Kazumitsu Seki, Takashi Yoshie, Koichi Kadosaki
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Patent number: 7329944Abstract: A leadframe for a semiconductor device of the present invention is a leadframe for a semiconductor device having a stage section where a semiconductor chip is to be mounted, an inner lead section connected to the stage section, and an outer lead section connected to the inner lead section. The leadframe has (1) a nickel (Ni) layer 1, (2) a palladium (Pd) or palladium alloy layer 2, (3) a tin (Sn) or tin alloy layer or a zinc (Zn) or zinc alloy layer 3, 3a, or 3b, and (4) a gold (Au) layer 4, 4a, or 4b, all of which are formed on a base material B forming the leadframe in sequence from the surface of the leadframe.Type: GrantFiled: March 22, 2006Date of Patent: February 12, 2008Assignee: Shinko Electric Industries Co., Ltd.Inventors: Kazumitsu Seki, Harunobu Sato, Muneaki Kure
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Publication number: 20070272441Abstract: A highly reliable plated lead finishing structure for a semiconductor part using a Pd film or a Pd alloy film, instead of a traditional solder plating material, as a brazing metal, without causing a problem of short-circuits between terminals due to whiskers, is provided. In the plated lead finishing structure of the invention, when a plated film having a thickness of not larger than 0.3 ?m is formed using Pd or a Pd alloy (26), instead of a conventional solder-plating material as a brazing metal, on the surfaces of the external connection terminals (10, 12) of a semiconductor part using copper or a copper alloy-based material, the film is plated without interposing any underlying layer or any intermediate metal layer between the material and the Pd— or Pd alloy-plated layer. In some cases, Au or an Au alloy (28) is further plated and has a thickness of not larger than 0.1 ?m on the plated film.Type: ApplicationFiled: May 16, 2005Publication date: November 29, 2007Applicant: Shinko Electric Industries Co., Ltd.Inventors: Kazumitsu Seki, Takashi Yoshie, Muneaki Kure
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Patent number: 7301226Abstract: A conductor substrate for mounting a semiconductor element, at least a portion thereof mounting the semiconductor element being sealed with an insulating resin, wherein an uppermost surface layer of the conductor substrate comprises copper or an alloy thereof, and the conductor substrate is partly or entirely covered with a layer of copper oxide containing a hydroxide formed upon the surface treatment of the conductor substrate and a process of producing the conductor substrate as well as a process for the production of a semiconductor device using the conductor substrate.Type: GrantFiled: April 15, 2004Date of Patent: November 27, 2007Assignee: Shinko Electric Industries Co., Ltd.Inventors: Kazumitsu Seki, Yoshihito Miyahara, Muneaki Kure
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Publication number: 20070090501Abstract: A lead frame base is coated with a four-layer plating. The four-layer plating includes an underlayer plating (Ni), a palladium plating, a silver plating and a gold plating arranged in this order from bottom to top.Type: ApplicationFiled: October 19, 2006Publication date: April 26, 2007Inventors: Seishi Oida, Takahiro Nakano, Yoshito Miyahara, Takashi Yoshie, Harunobu Satou, Kouichi Kadosaki, Kazumitsu Seki
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Publication number: 20070085178Abstract: A conductor substrate for mounting a semiconductor element, at least a portion thereof mounting the semiconductor element being sealed with an insulating resin, wherein an uppermost surface layer of the conductor substrate comprises copper or an alloy thereof, and the conductor substrate is partly or entirely covered with a layer of copper oxide containing a hydroxide formed upon the surface treatment of the conductor substrate and a process of producing the conductor substrate as well as a process for the production of a semiconductor device using the conductor substrate.Type: ApplicationFiled: December 4, 2006Publication date: April 19, 2007Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Kazumitsu Seki, Yoshihito Miyahara, Muneaki Kure
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Patent number: 7190057Abstract: A packaging component used for constituting a package mounting a semiconductor element, and a semiconductor package using the packaging component. The packaging component has on at least a portion of the surface thereof a covered surface which is sealed with an insulating resin or on which an adhesive layer is applied, and the packaging component comprises a conductor substrate and an electrically conducting layer partly or entirely covering the surface thereof, and the electrically conducting layer comprises a rough-surface plated layer having a roughened surface profile on the covered surface. The packaging component includes, for example, a lead frame and a heat-radiating or heat-dissipating plate.Type: GrantFiled: April 30, 2004Date of Patent: March 13, 2007Assignee: Shinko Electric Industries Co., Ltd.Inventors: Kazumitsu Seki, Takashi Yoshie, Harunobu Sato, Yoshihito Miyahara
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Publication number: 20060214272Abstract: A leadframe for a semiconductor device of the present invention is a leadframe for a semiconductor device having a stage section where a semiconductor chip is to be mounted, an inner lead section connected to the stage section, and an outer lead section connected to the inner lead section. The leadframe has (1) a nickel (Ni) layer 1, (2) a palladium (Pd) or palladium alloy layer 2, (3) a tin (Sn) or tin alloy layer or a zinc (Zn) or zinc alloy layer 3, 3a, or 3b, and (4) a gold (Au) layer 4, 4a, or 4b, all of which are formed on a base material B forming the leadframe in sequence from the surface of the leadframe.Type: ApplicationFiled: March 22, 2006Publication date: September 28, 2006Applicant: Shinko Electric Industries Co., Ltd.Inventors: Kazumitsu Seki, Harunobu Sato, Muneaki Kure
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Publication number: 20060125073Abstract: Lead frames of a Pd-PPF structure for use in a semiconductor device comprising inner leads and outer leads, wherein a whole surface of the substrate constituting the lead frame or at least the outer leads has a composite plated layer, and the composite plated layer comprises an underlayer consisting of an Ni-based plating layer deposited on the whole surface of the substrate constituting the lead frame or on at least the outer leads, a Pd— or Pd alloy-plating layer deposited at a thickness of 0.005 to 0.01 ?m on an upper surface of the underlayer, and an Au-plating layer deposited at a thickness of 0.02 to 0.1 ?m on an upper surface of the Pd— or Pd alloy-plating layer. When a semiconductor device is mounted on a packaging substrate by using a lead-free Sn—Zn-based solder or any other lead-free solder, the wettability between the lead frame and the lead-free Sn—Zn-based solder or any other lead-free solder is improved to thereby improve the packaging property of the semiconductor device.Type: ApplicationFiled: April 19, 2005Publication date: June 15, 2006Inventors: Kazumitsu Seki, Takashi Yoshie, Koichi Kadosaki
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Publication number: 20040262719Abstract: A lead frame, for semiconductor devices, provided with at least internal lead portions and external lead portions, the lead frame comprising: a base material of the lead frame consisting of copper or copper alloy; Pd or Pd alloy plated layers formed, on all surfaces or on at least the internal or external lead portions, through plated-under layers; and the plated under layers consisting of non-ferromagnetic metal in place of Ni plated layer. Ag, Sn, Au or Zn plated layer may be preferably used as the non-ferromagnetic metal. Otherwise, Sn—Ag or Sn—Zn alloy plated layer may also be preferably used as the non-ferromagnetic metal.Type: ApplicationFiled: June 28, 2004Publication date: December 30, 2004Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Kazumitsu Seki, Muneaki Kure
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Publication number: 20040232534Abstract: A packaging component used for constituting a package mounting a semiconductor element, and a semiconductor package using the packaging component. The packaging component has on at least a portion of the surface thereof a covered surface which is sealed with an insulating resin or on which an adhesive layer is applied, and the packaging component comprises a conductor substrate and an electrically conducting layer partly or entirely covering the surface thereof, and the electrically conducting layer comprises a rough-surface plated layer having a roughened surface profile on the covered surface. The packaging component includes, for example, a lead frame and a heat-radiating or heat-dissipating plate.Type: ApplicationFiled: April 30, 2004Publication date: November 25, 2004Applicant: SHINKO ELECTRIC INDUSTRIES, CO., LTD.Inventors: Kazumitsu Seki, Takashi Yoshie, Harunobu Sato, Yoshihito Miyahara
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Publication number: 20040207056Abstract: A conductor substrate for mounting a semiconductor element, at least a portion thereof mounting the semiconductor element being sealed with an insulating resin, wherein an uppermost surface layer of the conductor substrate comprises copper or an alloy thereof, and the conductor substrate is partly or entirely covered with a layer of copper oxide containing a hydroxide formed upon the surface treatment of the conductor substrate and a process of producing the conductor substrate as well as a process for the production of a semiconductor device using the conductor substrate.Type: ApplicationFiled: April 15, 2004Publication date: October 21, 2004Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Kazumitsu Seki, Yoshihito Miyahara, Muneaki Kure
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Patent number: 6593643Abstract: A semiconductor device lead frame made of copper or a copper alloy used for a resin sealing type semiconductor device, comprising a lead frame body made of copper or a copper alloy, a double-layer under plating film formed on the lead frame body and comprising a lower layer made of zinc or a copper-zinc alloy and an upper layer made of copper having a thickness of 0.02 to 0.4 &mgr;m and a precious metal plating film formed on at least a wire bonding portion of an inner lead of the copper upper layer of the under plating film. This lead frame is excellent in adhesion with a sealing resin, is free from contaminate a precious metal plating solution (particularly a silver plating solution), has a good appearance of the precious metal plating film, is excellent in corrosion resistance and moisture resistance, and has a good appearance and adhesion of an external solder plating film.Type: GrantFiled: December 7, 2000Date of Patent: July 15, 2003Assignee: Shinko Electric Industries Co., Ltd.Inventors: Kazumitsu Seki, Takashi Yoshie, Harunobu Sato