Patents by Inventor Kazunaga Ohnishi

Kazunaga Ohnishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9269644
    Abstract: A method for producing a semiconductor device includes solder-connecting a semiconductor chip, onto an insulating substrate including a ceramic board and having conductor layers on two surfaces thereof, with a lead-free solder; warping a radiating base such that a surface of the radiating base on a side opposite to the insulating substrate is convex; and solder-connecting the insulating substrate onto the warped radiating base with the lead-free solder so as to provide a substantially flat solder-connected radiating base.
    Type: Grant
    Filed: September 3, 2013
    Date of Patent: February 23, 2016
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Yoshitaka Nishimura, Akira Morozumi, Kazunaga Ohnishi, Eiji Mochizuki, Yoshikazu Takahashi
  • Publication number: 20140080262
    Abstract: A method for producing a semiconductor device includes solder-connecting a semiconductor chip, onto an insulating substrate including a ceramic board and having conductor layers on two surfaces thereof, with a lead-free solder; warping a radiating base such that a surface of the radiating base on a side opposite to the insulating substrate is convex; and solder-connecting the insulating substrate onto the warped radiating base with the lead-free solder so as to provide a substantially flat solder-connected radiating base.
    Type: Application
    Filed: September 3, 2013
    Publication date: March 20, 2014
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Yoshitaka NISHIMURA, Akira MOROZUMI, Kazunaga OHNISHI, Eiji MOCHIZUKI, Yoshikazu TAKAHASHI
  • Publication number: 20060157862
    Abstract: A high-reliability power semiconductor device uses a lead-free solder layer to connect a semiconductor chip such as an IGBT to an insulating substrate having a ceramic board and conductor layers, and a lead-free solder layer to connect the insulating substrate to a radiating base. Before the insulating substrate and the radiating base are solder-connected, the radiating base is warped such that the surface of the radiating base on the side opposite to the insulating substrate is convex. The insulating substrate is solder-connected onto the warped radiating base with the lead-free solder so as to provide a substantially flat solder-connected radiating base. When the radiating base is attached to a cooling fin, the thermal resistances are lower, and heat from the semiconductor chip is effectively dissipated so as to prevent abnormal temperature rise.
    Type: Application
    Filed: January 9, 2006
    Publication date: July 20, 2006
    Applicant: Fuji Electric Device Technology, Co., Ltd.
    Inventors: Yoshitaka Nishimura, Akira Morozumi, Kazunaga Ohnishi, Eiji Mochizuki, Yoshikazu Takahashi