Abstract: A semiconductor device is provided. The device comprises: a first transistor that includes a first primary terminal, a second primary terminal and a first control terminal; a second transistor that includes a third primary terminal, a fourth primary terminal and a second control terminal; and a resistive element. The first and third primary terminal are connected to a first voltage line. The second primary terminal and one terminal of the resistive element are connected to a second voltage line. The first and second control terminal, the fourth primary terminal and the other terminal of the resistive element are connected to a node. A potential change in the third primary terminal is transmitted to the first control terminal by capacitive coupling between the third primary terminal and the node, turning on the first transistor.

Abstract: A semiconductor device is provided. The device comprises: a first transistor that includes a first primary terminal, a second primary terminal and a first control terminal; a second transistor that includes a third primary terminal, a fourth primary terminal and a second control terminal; and a resistive element. The first and third primary terminal are connected to a first voltage line. The second primary terminal and one terminal of the resistive element are connected to a second voltage line. The first and second control terminal, the fourth primary terminal and the other terminal of the resistive element are connected to a node. A potential change in the third primary terminal is transmitted to the first control terminal by capacitive coupling between the third primary terminal and the node, turning on the first transistor.

Abstract: A semiconductor device includes a transistor connected to a terminal having a first potential, an anti-fuse element connected between the transistor and a terminal having a second potential different from the first potential, and a resistor element connected in parallel with the anti-fuse element. An electric path between the transistor and the anti-fuse element has a length smaller than a length of an electric path between the transistor and the resistor element.

Abstract: A semiconductor apparatus includes a transistor connected to a first potential terminal having a first potential, an anti-fuse element connected between the transistor and a second potential terminal having a second potential, a resistive element connected in parallel with the anti-fuse element between the transistor and the second potential terminal, and a temperature adjustment unit disposed to face the resistive element.

Abstract: A semiconductor device includes, an anti-fuse element, a transistor connected via the anti-fuse element to a power source terminal which may apply a voltage to the anti-fuse element, an ESD protection element connected to the power source terminal via a node, and a first resistive element disposed in an electric path between the node and the anti-fuse element, wherein resistance of the first resistive element increases with an increase of a voltage applied to the first resistive element.

Abstract: An optical sensor includes a bare chip mounted on a circuit board, a protection member configured to protect the bare chip, a pad connected to the bare chip via a wire, and a pattern connecting the pad and a terminal portion at an edge of the circuit board to each other. The pattern is connected to the terminal portion on a same surface as a surface on which the bare chip is mounted, and a portion of the pattern between the protection member and the terminal portion is covered with solder resist.

Abstract: A liquid discharge head substrate, comprising a discharging element configured to discharge a liquid, a driver configured to drive the discharging element, a conductive protection film covering the discharging element via an insulating film, and a controller connected to the protection film and configured to output a control signal that sets the driver in an inactive state when a change of a voltage of the protection film or a change in a current that flows to the protection film is detected.

Abstract: A semiconductor device is provided. The device comprises: a first transistor that includes a first primary terminal, a second primary terminal and a first control terminal; a second transistor that includes a third primary terminal, a fourth primary terminal and a second control terminal; and a resistive element. The first and third primary terminal are connected to a first voltage line. The second primary terminal and one terminal of the resistive element are connected to a second voltage line. The first and second control terminal, the fourth primary terminal and the other terminal of the resistive element are connected to a node. A potential change in the third primary terminal is transmitted to the first control terminal by capacitive coupling between the third primary terminal and the node, turning on the first transistor.

Abstract: A semiconductor device for a liquid discharge head is provided. The device includes first transistors configured to receive a first voltage at a first terminal and second transistors configured to receive a second voltage at a first terminal. The device further includes discharge elements configured to discharge a liquid. Each discharge element is connected between a second terminal of a first transistor and a second terminal of a second transistor. A first control circuit is configured to supply a first control signal for controlling a conductive state of the first transistors via a common signal. A stabilization circuit is configured to stabilize a voltage of at least one of the second terminal of the first transistor or the control terminal of the first transistor.

Abstract: A semiconductor device includes, an anti-fuse element, a transistor connected via the anti-fuse element to a power source terminal which may apply a voltage to the anti-fuse element, an ESD protection element connected to the power source terminal via a node, and a first resistive element disposed in an electric path between the node and the anti-fuse element, wherein resistance of the first resistive element increases with an increase of a voltage applied to the first resistive element.

Abstract: A liquid discharge substrate according to an embodiment of the present invention includes a plurality of heating elements, a plurality of driving elements, a signal supplying unit which supplies a control signal used to control the plurality of driving elements, and a plurality of delay circuits which delay the control signal. A delay amount of a first delay circuit is different from a delay amount of a second delay circuit.

Abstract: A substrate includes an AND circuit and an LVC. The AND circuit generates a control signal for switching an NMOS transistor. The LVC controls the gate voltage of the NMOS transistor on the basis of the control signal. The substrate applies a constant gate voltage to a PMOS transistor without using the AND circuit and the LVC.

Abstract: A semiconductor device for a liquid discharge head is provided. The device includes first transistors configured to receive a first voltage at a first terminal and second transistors configured to receive a second voltage at a first terminal. The device further includes discharge elements configured to discharge a liquid. Each discharge element is connected between a second terminal of a first transistor and a second terminal of a second transistor. A first control circuit is configured to supply a first control signal for controlling a conductive state of the first transistors via a common signal. A stabilization circuit is configured to stabilize a voltage of at least one of the second terminal of the first transistor or the control terminal of the first transistor.

Abstract: A semiconductor device for a liquid discharge head is provided. The device includes first and second electrodes, discharge elements configured to give energy to a liquid, first switching elements configured to electrically connect first terminals of discharge elements to the first electrode, and including one or more first switching elements each connected to two or more discharge elements, and second switching elements configured to electrically connect second terminals of the plurality of discharge elements to the second electrode, and including one or more second switching element each connected to two or more discharge elements. Two or more discharge elements connected to a same second switching element are connected to different first switching elements.

Abstract: A liquid discharge substrate includes a plurality of discharge elements disposed on a substrate, a first transistor electrically connected to the plurality of discharge elements, and a plurality of second transistors. The first transistor is disposed between the plurality of discharge elements and the plurality of second transistors.

Abstract: A substrate includes an AND circuit and an LVC. The AND circuit generates a control signal for switching an NMOS transistor. The LVC controls the gate voltage of the NMOS transistor on the basis of the control signal. The substrate applies a constant gate voltage to a PMOS transistor without using the AND circuit and the LVC.

Abstract: A liquid discharge head substrate is provided. The liquid discharge head substrate includes a discharge unit including a discharge element configured to generate energy for discharging a liquid from an orifice and a discharge control circuit configured to control the discharge element, and a first voltage generation circuit configured to supply, to the discharge control circuit, a first driving voltage for driving the discharge control circuit. The discharge unit includes a first node having a voltage correlated with a voltage to be supplied to the discharge element. The first voltage generation circuit controls the first driving voltage based on a comparison result of the voltage of the first node and a first reference voltage supplied from outside of the liquid discharge head substrate.

Abstract: A liquid discharging substrate comprising discharging units, a first pad arranged on a first side, a second pad arranged on a second side, a signal generating unit arranged between the first pad and the second pad, level shifters, for shifting a level of a signal generated by the signal generating unit to output the signal to the discharging units, arranged between the signal generating unit and the second pad, a first wiring line for supplying the signal generating unit with a first reference voltage received by the first pad, and a second wiring line for supplying the level shifters with the second reference voltage received by the second pad, wherein the first wiring line and the second wiring line are isolated from each other between the signal generating unit and the level shifters in a planar view.

Abstract: A liquid discharging substrate comprising discharging units, a first pad arranged on a first side, a second pad arranged on a second side, a signal generating unit arranged between the first pad and the second pad, level shifters, for shifting a level of a signal generated by the signal generating unit to output the signal to the discharging units, arranged between the signal generating unit and the second pad, a first wiring line for supplying the signal generating unit with a first reference voltage received by the first pad, and a second wiring line for supplying the level shifters with the second reference voltage received by the second pad, wherein the first wiring line and the second wiring line are isolated from each other between the signal generating unit and the level shifters in a planar view.

Abstract: Provided is an ultrasonic detection device including: a capacitive electromechanical transducer including a cell that includes a first electrode and a second electrode disposed so as to oppose with a space; a voltage source for developing a potential difference between the first electrode and the second electrode; and an electric circuit for converting a current, which is caused by a change in electrostatic capacitance between the first electrode and the second electrode due to vibration of the second electrode, into a voltage, in which the capacitive electromechanical transducer provides an output current with a high-pass characteristic having a first cutoff frequency with respect to a frequency, the electric circuit provides an output with a low-pass characteristic having a second cutoff frequency with respect to the frequency, and the second cutoff frequency is smaller than the first cutoff frequency.