Patents by Inventor Kazunari Goto

Kazunari Goto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240129430
    Abstract: According to one embodiment, a display device includes a display panel having a display area where an image is displayed, a plurality of cameras provided at positions overlapping with the display area in plan view to capture a user opposed to the display device as a subject, a controller selecting one of the plurality of cameras as a camera to capture the subject, based on positions of eyes of a person included in the image displayed in the display area.
    Type: Application
    Filed: October 16, 2023
    Publication date: April 18, 2024
    Inventors: Kazunari TOMIZAWA, Naoshi GOTO, Tsutomu HARADA, Junji KOBASHI
  • Patent number: 11936283
    Abstract: A gate driving power source device can be miniaturized by sharing power source units, and a large current can be prevented from locally flowing in a single chip even when a short-circuit failure occurs in a multi-phase conversion circuit included in a power conversion device. There is provided a shared power source unit supplying a shared DC power source to a gate drive circuit provided in any one of a plurality of lower arms of multi-phase conversion circuits or any one of a plurality of upper arms of the multi-phase conversion circuit and gate drive circuits provided in upper arms or lower arms of other conversion circuits.
    Type: Grant
    Filed: November 17, 2021
    Date of Patent: March 19, 2024
    Assignee: HITACHI ASTEMO, LTD.
    Inventors: Masatoshi Goto, Yuta Nakamura, Yoshinori Sagiya, Kazunari Kurokawa, Shugo Ueno, Shintaro Tai
  • Patent number: 5706477
    Abstract: A memory unit stores logic information expressing a plurality of logic function elements constituting a logic circuit, and wiring information about a plurality of components that correspond to the plurality of logic function elements on a printed circuit board. An extracting unit extracts the wiring information and logic information to be used for executing circuit simulation from among the wiring information and logic information stored in the memory unit. A circuit model conversion unit converts the wiring information and logic information extracted by the extracting unit into a circuit model suitable for executing the circuit simulation. A simulation unit executes the circuit simulation on the basis of the circuit model converted by the circuit model conversion unit, and identifies the electrical characteristics between the plurality of components that correspond to the wiring information and logic information extracted by the extracting unit.
    Type: Grant
    Filed: November 14, 1995
    Date of Patent: January 6, 1998
    Assignee: Fujitsu Limited
    Inventor: Kazunari Goto