Abstract: An object of the present disclosure is to provide a trench gate type power semiconductor device that does not easily break even when stress is applied. A SiC-MOSFET includes a SiC substrate, a drift layer of a first conductive type, formed on the SiC substrate, a base region of a second conductivity type formed in a surface layer of the drift layer, a source region of the first conductivity type selectively formed in a surface layer of the base region, a trench extending through the base region and the source region and reaching the drift layer, a gate electrode embedded in the trench and having a V-shaped groove on an upper surface thereof, and an oxide film formed on an upper surface including the groove of the gate electrode, in which a bottom of the V-shape groove is deeper than the base region.

Abstract: Even when a stress is applied due to energization or switching operation, a connection state of electrode layers can be appropriately maintained. A semiconductor device includes a semiconductor layer of first conductivity type, an upper surface structure formed on a surface layer of the semiconductor layer, and an upper surface electrode formed over the upper surface structure. The upper surface electrode includes a first electrode formed on an upper surface of the semiconductor layer, and a second electrode formed over an upper surface of the first electrode. The first concave portion is formed on the upper surface of the first electrode. A side surface of the first concave portion has a tapered shape. The second electrode is formed over the upper surface of the first electrode including an inside of the first concave portion.

Abstract: A power semiconductor device includes a termination region having a corner and an element region inside the termination region. An SiC substrate spans the element region and the termination region. An interlayer insulating film has an outer edge in the termination region. A source electrode is in contact with the SiC substrate in the element region, and has an outer edge on the interlayer insulating film in the termination region. An insulating protective film covers the outer edge of the interlayer insulating film and the outer edge of the source electrode, and has an inner edge on the source electrode. At the corner of the termination region, the outer edge of the interlayer insulating film has a radius of curvature R1, and the inner edge of the insulating protective film has a radius of curvature R2. The radius of curvature R2 is greater than the radius of curvature R1.

Abstract: A wafer grinding apparatus performs grinding processing for grinding a semiconductor wafer with a grindstone. The grindstone has a wear rate as a characteristic. The wear rate is 5% or more, and less than 200%. A determination part performs determination processing for determining whether a grinding state with respect to the semiconductor wafer is abnormal or normal, based on at least one of a load current of a motor and a grinding wear amount.

Abstract: Even when a stress is applied due to energization or switching operation, a connection state of electrode layers can be appropriately maintained. A semiconductor device includes a semiconductor layer of first conductivity type, an upper surface structure formed on a surface layer of the semiconductor layer, and an upper surface electrode formed over the upper surface structure. The upper surface electrode includes a first electrode formed on an upper surface of the semiconductor layer, and a second electrode formed over an upper surface of the first electrode. The first concave portion is formed on the upper surface of the first electrode. A side surface of the first concave portion has a tapered shape. The second electrode is formed over the upper surface of the first electrode including an inside of the first concave portion.

Abstract: A semiconductor layer has a first face, a second face, and a first side face. A silicon carbide substrate has a third face facing the second face, a fourth face, and a second side face. A first electrode layer forms an interface with part of the first face. An insulation film is provided around the first electrode layer on the first face of the semiconductor layer. A second electrode layer is provided on the fourth face and extends outward of the interface between the first face and the first electrode layer in an in-plane direction. A crush layer is provided on the first side face of the semiconductor layer and on the second side face of the silicon carbide substrate. The thickness of the crush layer on the second side face is greater than the thickness of the crush layer on the first side face.

Abstract: Included herein are, a step of forming an active region for a semiconductor device on a front surface of a SiC substrate, a step of forming a SiC substrate-to-drain electrode bonding region on a back surface of the SiC substrate by grinding it using an abrasive whose average abrasive grain size is within a specified range, a step of depositing a film of a first drain electrode on the SiC substrate-to-drain electrode bonding region, a step of electrically connecting the first drain electrode with the SiC substrate-to-drain electrode bonding region, and a step of depositing a film of a second drain electrode on the first drain electrode, so that a SiC semiconductor device having a high mechanical strength with a reduced energization loss is achieved.

Abstract: Included herein are, a step of forming an active region for a semiconductor device on a front surface of a SiC substrate, a step of forming a SiC substrate-to-drain electrode bonding region on a back surface of the SiC substrate by grinding it using an abrasive whose average abrasive grain size is within a specified range, a step of depositing a film of a first drain electrode on the SiC substrate-to-drain electrode bonding region, a step of electrically connecting the first drain electrode with the SiC substrate-to-drain electrode bonding region, and a step of depositing a film of a second drain electrode on the first drain electrode, so that a SiC semiconductor device having a high mechanical strength with a reduced energization loss is achieved.

Abstract: A semiconductor layer has a first face, a second face, and a first side face. A silicon carbide substrate has a third face facing the second face, a fourth face, and a second side face. A first electrode layer forms an interface with part of the first face. An insulation film is provided around the first electrode layer on the first face of the semiconductor layer. A second electrode layer is provided on the fourth face and extends outward of the interface between the first face and the first electrode layer in an in-plane direction. A crush layer is provided on the first side face of the semiconductor layer and on the second side face of the silicon carbide substrate. The thickness of the crush layer on the second side face is greater than the thickness of the crush layer on the first side face.

Abstract: A wafer grinding apparatus performs grinding processing for grinding a semiconductor wafer with a grindstone. The grindstone has a wear rate as a characteristic. The wear rate is 5% or more, and less than 200%. A determination part performs determination processing for determining whether a grinding state with respect to the semiconductor wafer is abnormal or normal, based on at least one of a load current of a motor and a grinding wear amount.

Abstract: As a first grinding step, a peripheral portion of a back surface of a wafer (1) is ground with a first grindstone (17) to form a fractured layer (19) in the peripheral portion. Subsequently, as a second grinding step, a central portion of the back surface of the wafer (1) is ground with the first grindstone (17) to form a recess (21) while the peripheral portion in which the fractured layer (19) is formed is left as a rib (20). Subsequently, as a third grinding step, a bottom surface of the recess (21) is ground with a second grindstone (22) of an abrasive grain size smaller than that of the first grindstone (17) to reduce a thickness of the wafer (1).

Abstract: A method for manufacturing a semiconductor device includes: forming a first major electrode on a first major surface of a semiconductor substrate; forming a second major electrode on a second major surface of the semiconductor substrate opposite to the first major surface; carrying out a surface activating treatment to activate surfaces of the first and second major electrodes; carrying out a surface cleaning treatment to clean up the surfaces of the first and second major electrodes; and after the surface activating treatment and the surface cleaning treatment, simultaneously forming first and second Ni films on the first and second major electrodes respectively by a wet film forming method, wherein a ratio of crystalline Ni contained in the first and second Ni films is 2% or more.

Abstract: As a first grinding step, a peripheral portion of a back surface of a wafer (1) is ground with a first grindstone (17) to form a fractured layer (19) in the peripheral portion. Subsequently, as a second grinding step, a central portion of the back surface of the wafer (1) is ground with the first grindstone (17) to form a recess (21) while the peripheral portion in which the fractured layer (19) is formed is left as a rib (20). Subsequently, as a third grinding step, a bottom surface of the recess (21) is ground with a second grindstone (22) of an abrasive grain size smaller than that of the first grindstone (17) to reduce a thickness of the wafer (1).

Abstract: A device region (17) is formed at a central part of a semiconductor wafer (2) and a ring-shaped reinforced portion (18) which is thicker than the device region (17) is formed on an outer circumference of the device region (17). After forming the device region (17) and the ring-shaped reinforced portion (18), the semiconductor wafer (2) is subjected to wet treatment. After the wet treatment, the semiconductor wafer (2) is rotated and dried. A center position of the semiconductor wafer (2) is different from a center position of the ring-shaped reinforced portion (18).

Abstract: On a first wafer surface of a semiconductor wafer, a projection-depression shape is formed. On the first wafer surface, a resin member is so formed to have a resin outer peripheral end positioned away from a wafer outer peripheral end and expose the wafer outer peripheral end. By partially removing the semiconductor wafer, on a second wafer surface of the semiconductor wafer, formed is a recessed shape having a recessed-portion outer peripheral end positioned 0.5 mm or more inside from the resin outer peripheral end. After performing a processing on the second wafer surface, the resin member is removed.

Abstract: A method for manufacturing a semiconductor device includes: forming a first major electrode on a first major surface of a semiconductor substrate; forming a second major electrode on a second major surface of the semiconductor substrate opposite to the first major surface; carrying out a surface activating treatment to activate surfaces of the first and second major electrodes; carrying out a surface cleaning treatment to clean up the surfaces of the first and second major electrodes; and after the surface activating treatment and the surface cleaning treatment, simultaneously forming first and second Ni films on the first and second major electrodes respectively by a wet film forming method, wherein a ratio of crystalline Ni contained in the first and second Ni films is 2% or more.

Abstract: A device region (17) is formed at a central part of a semiconductor wafer (2) and a ring-shaped reinforced portion (18) which is thicker than the device region (17) is formed on an outer circumference of the device region (17). After forming the device region (17) and the ring-shaped reinforced portion (18), the semiconductor wafer (2) is subjected to wet treatment. After the wet treatment, the semiconductor wafer (2) is rotated and dried. A center position of the semiconductor wafer (2) is different from a center position of the ring-shaped reinforced portion (18).

Abstract: A wafer is mounted to a dicing frame using a holding tape. A plurality of semiconductor devices are provided on a center portion of a major surface of the wafer. A ring-like reinforcing section is provided on a periphery of the major surface. The holding tape is adhered to the major surface The holding tape is heated to at least 0.6 times of melting temperature of the holding tape so as to adhere the holding tape along a step of the ring-like reinforcing section.

Abstract: A method of manufacturing a semiconductor device includes the steps of preparing a semiconductor wafer having a thick portion in an outer circumferential end portion and a thin portion in a central portion, attaching a support material to one surface of the semiconductor wafer, dividing the semiconductor wafer into the thick portion and the thin portion, and cutting the thin portion, after the division, while supporting the thin portion by the support material.

Abstract: A method of manufacturing a semiconductor device, includes a wafer grinding step of, by means of a revolving grinding stone, forming a thinned portion in a wafer while at the same time forming a slope surrounding said thinned portion, wherein during said formation of said slope, said grinding stone is positioned so that there is always a space between said slope and the facing side of said grinding stone, wherein said thinned portion is thinner than a peripheral portion of said wafer, and wherein said slope extends along and defines an inner circumferential side of said peripheral portion and forms an angle of 75° or more but less than 90° with respect to a main surface of said wafer. The method of manufacturing a semiconductor device further includes a step of forming a semiconductor device in said thinned portion.