Patents by Inventor Kazunari Yamaguchi

Kazunari Yamaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7919256
    Abstract: A method for the early detection of disease through the use of reagents bound by IgM antibodies is described. A reagent and method for the detection of anti-Borna disease virus antibodies are also described.
    Type: Grant
    Filed: March 22, 2004
    Date of Patent: April 5, 2011
    Assignee: Sysmex Corporation
    Inventors: Kazunari Yamaguchi, Yoichiro Horii, Youichi Takahama, Shinya Nagai
  • Patent number: 7414666
    Abstract: A portable camera-phone has a strobe consisting of LEDs emitting light with a determined quantity of light emission, as an auxiliary light source for image pick-up of an object by a camera. In an image pick-up mode, the light emission quantity is adjusted repeatedly until a total exposure value matches an optimal exposure value, based on a difference between a total exposure value of an image signal output from the camera with the light emission quantity determined last time and a total exposure value when emission is OFF. Therefore, in the image pick-up mode, two reference values are used for determining the light emission quantity to have the total exposure value match the optimal exposure value, and hence the light emission quantity can be determined with high accuracy. As a result, an optimal exposure level can be obtained with high accuracy.
    Type: Grant
    Filed: July 21, 2003
    Date of Patent: August 19, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Kazunari Yamaguchi
  • Publication number: 20040234955
    Abstract: With respect to immunoglobulins that are raised against an exogenous antigen, when the class switching from IgM to IgG necessitates a long period of time, detect of IgM antibody alone, or concurrent detect of the IgM antibodies and IgG antibodies to the exogenous antigen is achieved. An antigen polypeptide for performing the examination of an antibody to Borna disease virus (may be referred to as “BDV”) as an example of such an exogenous antigen in a more accurate manner, and a method for detecting anti-BDV antibody in which such a polypeptide is used are provided.
    Type: Application
    Filed: March 22, 2004
    Publication date: November 25, 2004
    Applicant: SYSMEX CORPORATION
    Inventors: Kazunari Yamaguchi, Yoichiro Horii, Youichi Takahama, Shinya Nagai
  • Patent number: 6137536
    Abstract: The present invention relates to processing of a video signal in a computer display and the like, and aims at providing a synchronizing signal generator which can obtain a vertical synchronizing pulse whose phase is stable with respect to the horizontal synchronizing signal and in which a counter for counting a clock synchronized with the horizontal synchronizing signal has a small counted value. It comprises a counter (8R) for detecting the vertical synchronization period (N) on the basis of the horizontal synchronizing signal (Hsync) and an output switching unit (14) which outputs a vertical synchronizing pulse (Vd) synchronized with the vertical synchronizing signal (Vsync) when the input vertical synchronizing signal (Vsync) has a vertical synchronization period of a given range, and which selects and outputs a pulse (Sq) having a given vertical synchronization period when the input vertical synchronizing signal does not have a vertical synchronization period of the given range.
    Type: Grant
    Filed: April 20, 1999
    Date of Patent: October 24, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Kazunari Yamaguchi
  • Patent number: 5940136
    Abstract: The invention presents a dot clock reproducing apparatus for automatically reproducing the dot clock easily, by setting the dot clock frequency of a video signal source, and correcting the phase difference of the dot clock occurring in the transmission route or the like, and also presents a dot clock reproducing method comprising, in dot clock reproduction, a step of sampling at a frequency different from the dot clock of video signal, a step of detecting the aliasing frequency component occurring at this time, and a step of reproducing the dot clock so as not to cause this aliasing frequency component, and as an apparatus employing such method, the invention further provides a dot clock reproducing apparatus comprising A/D converting means for receiving an adjusting signal delivered from a video signal source, and sampling this adjusting signal to convert into a digital signal, PLL means for dividing a specified synchronizing signal and generating a sampling clock for the A/D converting means, frequency anal
    Type: Grant
    Filed: May 6, 1997
    Date of Patent: August 17, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideki Abe, Noriyuki Iwakura, Takahisa Hatano, Yoshikuni Shindo, Kazuhiro Yamada, Kazushige Kida, Kazunari Yamaguchi
  • Patent number: 5736914
    Abstract: A demagnetizing device for a cathode ray tube having a screen portion and a funnel portion, comprising:an outer magnetic shielding member which is arranged so as to surround a funnel portion of a cathode ray tube, and which is formed of a magnetic sheet; anda demagnetizing coil which is arranged so as to encircle a screen portion of the cathode ray tube;wherein the demagnetizing coil is arranged so as to be apart from the outer magnetic shielding member by not less than 9.5 mm.
    Type: Grant
    Filed: January 4, 1996
    Date of Patent: April 7, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazunari Yamaguchi, Kouji Tanaka, Yukitaka Hisamatsu
  • Patent number: 5485223
    Abstract: A noise reducing apparatus includes a delay device for delaying a first video signal by one horizontal period. Also included is a first subtracter for subtracting the output of the delay device from an input video signal and a limiter for clipping the output of the first subtracter at a designated level. A variable coefficient-multiplier is also provided for multiplying the output of the limiter by a variable coefficient k where 0<k<1. A second subtracter subtracts the output of the variable coefficient multiplier from the input video signal and an adder adds the output of the first subtracter and the output of the limiter. A coefficient multiplier is also provided for multiplying the output of the adder by a fixed value 0.5. A third subtracter subtracts the output of the coefficient multiplier from the input video signal and a correlation detector provides a signal to control the coefficient value of the variable coefficient multiplier in response to the output of the first subtracter.
    Type: Grant
    Filed: August 1, 1994
    Date of Patent: January 16, 1996
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazunari Yamaguchi, Atsuhisa Kageyama