Patents by Inventor Kazunori Fuji

Kazunori Fuji has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240047405
    Abstract: A semiconductor device includes an insulating layer, conductors, a semiconductor element and a sealing resin. The insulating layer has first and second surfaces opposite to each other in the thickness direction. Each conductor has an embedded part whose portion is embedded in the insulating layer and a redistribution part disposed at the second surface and connected to the embedded part. The semiconductor element has electrodes provided near the first surface and connected the embedded parts of the conductors. The semiconductor element is in contact with the first surface. The sealing resin partially covers the semiconductor element and is in contact with the first surface. The redistribution parts include portions outside the semiconductor element as viewed in the thickness direction. The insulating layer has grooves recessed from the second surface in the thickness direction. The redistribution parts are in contact with the grooves.
    Type: Application
    Filed: October 19, 2023
    Publication date: February 8, 2024
    Inventor: Kazunori FUJI
  • Publication number: 20230420909
    Abstract: This semiconductor light-emitting device includes a substrate having a substrate main surface, a semiconductor light-emitting element having a light-emitting element main surface mounted on the substrate main surface and facing the same side as the substrate main surface, and a light-emitting element side surface that is a light-emitting surface facing a direction intersecting the light-emitting element main surface, a switching element and a capacitor mounted on the substrate main surface and serving as drive elements used in driving the semiconductor light-emitting element, a translucent member formed from a material having a greater linear expansion coefficient than the substrate and transmitting light emitted from the light-emitting side surface, the translucent member covering the light-emitting element side surface, and a sealing resin formed from a material that has a smaller linear expansion coefficient than the translucent member, the sealing resin sealing the semiconductor light-emitting element, th
    Type: Application
    Filed: October 27, 2021
    Publication date: December 28, 2023
    Inventors: Koki SAKAMOTO, Kazunori FUJI, Atsushi YAMAGUCHI
  • Patent number: 11830843
    Abstract: A semiconductor device includes an insulating layer, conductors, a semiconductor element and a sealing resin. The insulating layer has first and second surfaces opposite to each other in the thickness direction. Each conductor has an embedded part whose portion is embedded in the insulating layer and a redistribution part disposed at the second surface and connected to the embedded part. The semiconductor element has electrodes provided near the first surface and connected the embedded parts of the conductors. The semiconductor element is in contact with the first surface. The sealing resin partially covers the semiconductor element and is in contact with the first surface. The redistribution parts include portions outside the semiconductor element as viewed in the thickness direction. The insulating layer has grooves recessed from the second surface in the thickness direction. The redistribution parts are in contact with the grooves.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: November 28, 2023
    Assignee: ROHM CO., LTD.
    Inventor: Kazunori Fuji
  • Publication number: 20230377973
    Abstract: A method for manufacturing a semiconductor device includes a step of preparing a semiconductor wafer source which includes a first main surface on one side, a second main surface on the other side and a side wall connecting the first main surface and the second main surface, an element forming step of setting a plurality of element forming regions on the first main surface of the semiconductor wafer source, and forming a semiconductor element at each of the plurality of element forming regions, and a wafer source separating step of cutting the semiconductor wafer source from a thickness direction intermediate portion along a horizontal direction parallel to the first main surface, and separating the semiconductor wafer source into an element formation wafer and an element non-formation wafer after the element forming step.
    Type: Application
    Filed: July 18, 2023
    Publication date: November 23, 2023
    Applicant: ROHM CO., LTD.
    Inventors: Masatoshi AKETA, Kazunori FUJI
  • Patent number: 11742243
    Abstract: A method for manufacturing a semiconductor device includes a step of preparing a semiconductor wafer source which includes a first main surface on one side, a second main surface on the other side and a side wall connecting the first main surface and the second main surface, an element forming step of setting a plurality of element forming regions on the first main surface of the semiconductor wafer source, and forming a semiconductor element at each of the plurality of element forming regions, and a wafer source separating step of cutting the semiconductor wafer source from a thickness direction intermediate portion along a horizontal direction parallel to the first main surface, and separating the semiconductor wafer source into an element formation wafer and an element non-formation wafer after the element forming step.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: August 29, 2023
    Assignee: ROHM CO., LTD.
    Inventors: Masatoshi Aketa, Kazunori Fuji
  • Publication number: 20230260922
    Abstract: A semiconductor device A1 disclosed includes: a semiconductor element 10 having an element obverse face and element reverse face that face oppositely in a thickness direction z, with an obverse-face electrode 11 (first electrode 111) and a reverse-face electrode 12 respectively formed on the element obverse face and the element reverse face; a conductive member 22A opposing the element reverse face and conductively bonded to the reverse-face electrode 12; a conductive member 22B spaced apart from the conductive member 22A and electrically connected to the obverse-face electrode 11; and a lead member 51 having a lead obverse face 51a facing in the same direction as the element obverse face and connecting the obverse-face electrode 11 and the conductive member 22B. The lead member 51, bonded to the obverse-face electrode 11 via a lead bonding layer 321, includes a protrusion 521 protruding in the thickness direction z from the lead obverse face 51a.
    Type: Application
    Filed: April 25, 2023
    Publication date: August 17, 2023
    Inventor: Kazunori FUJI
  • Patent number: 11710705
    Abstract: A semiconductor device A1 disclosed includes: a semiconductor element 10 having an element obverse face and element reverse face that face oppositely in a thickness direction z, with an obverse-face electrode 11 (first electrode 111) and a reverse-face electrode 12 respectively formed on the element obverse face and the element reverse face; a conductive member 22A opposing the element reverse face and conductively bonded to the reverse-face electrode 12; a conductive member 22B spaced apart from the conductive member 22A and electrically connected to the obverse-face electrode 11; and a lead member 51 having a lead obverse face 51a facing in the same direction as the element obverse face and connecting the obverse-face electrode 11 and the conductive member 22B. The lead member 51, bonded to the obverse-face electrode 11 via a lead bonding layer 321, includes a protrusion 521 protruding in the thickness direction z from the lead obverse face 51a.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: July 25, 2023
    Assignee: ROHM CO., LTD.
    Inventor: Kazunori Fuji
  • Publication number: 20230197544
    Abstract: A semiconductor device includes an insulating layer, a semiconductor element, a wiring layer and a sealing resin. The insulating layer includes obverse and reverse surfaces spaced apart in a thickness direction, and a penetrated part extending in the thickness direction. The semiconductor element, in contact with the obverse surface, includes an electrode corresponding to the penetrated part. The wiring layer includes connecting and main parts, where the connecting part is in the penetrated part and contacts the electrode, and the main part is connected to the connecting part on the reverse surface. The sealing resin, contacting the obverse surface, covers the semiconductor element. The electrode has a connecting surface facing the connecting part and including a first region exposed from the insulating layer through the penetrated part and a second region contacting the insulating layer. The first region has a greater surface roughness than the second region.
    Type: Application
    Filed: May 21, 2021
    Publication date: June 22, 2023
    Inventors: Kazunori FUJI, Xiaopeng WU
  • Publication number: 20230142319
    Abstract: A semiconductor light-emitting device includes light-emitting element, sealing resin and conductor. The light-emitting element has first and second surfaces spaced apart in a thickness direction with first element electrode on the first surface and with second element electrode on the second surface. The sealing resin covers at least the second surface. The conductor, forming a conduction path to the light-emitting element, includes a first interconnecting portion, an embedded portion, and a second interconnecting portion. The sealing resin has a cavity extending in the thickness direction and connected to the second element electrode. The first interconnecting portion is electrically connected to the first element electrode and extends in a direction crossing the thickness direction. The embedded portion is in the cavity and connected to the second element electrode. The second interconnecting portion is connected to the embedded portion and extends in the direction crossing the thickness direction.
    Type: Application
    Filed: April 1, 2021
    Publication date: May 11, 2023
    Inventors: Koki SAKAMOTO, Kazunori FUJI
  • Publication number: 20230048967
    Abstract: A package structure includes a metal member and a resin member. The metal member has an obverse surface facing one side in a first direction. The resin member is disposed in contact with at least a portion of the obverse surface. The obverse surface has a roughened area. The roughened area includes a plurality of first trenches recessed from the obverse surface, each of the first trenches having a surface with a greater roughness than the obverse surface. The plurality of first trenches extend in a second direction perpendicular to the first direction and are next to each other in a third direction perpendicular to the first direction and the second direction. The plurality of first trenches are filled up with the resin member.
    Type: Application
    Filed: October 25, 2022
    Publication date: February 16, 2023
    Inventor: Kazunori FUJI
  • Publication number: 20230036430
    Abstract: A bonded structure includes a semiconductor element, an electrical conductor and a sintered metal layer. The semiconductor element has an element obverse surface and an element reverse surface spaced apart from each other in a first direction and includes a reverse-surface electrode on the element reverse surface. The electrical conductor has a mount surface facing in a same direction as the element obverse surface and supports the semiconductor element with the mount surface facing the element reverse surface. The sintered metal layer bonds the semiconductor element to the electrical conductor and electrically connects the reverse-surface electrode and the electrical conductor. The mount surface includes a roughened area roughened by a roughening process. The sintered metal layer is formed on the roughened area.
    Type: Application
    Filed: October 12, 2022
    Publication date: February 2, 2023
    Inventor: Kazunori FUJI
  • Patent number: 11515223
    Abstract: A package structure includes a metal member and a resin member. The metal member has an obverse surface facing one side in a first direction. The resin member is disposed in contact with at least a portion of the obverse surface. The obverse surface has a roughened area. The roughened area includes a plurality of first trenches recessed from the obverse surface, each of the first trenches having a surface with a greater roughness than the obverse surface. The plurality of first trenches extend in a second direction perpendicular to the first direction and are next to each other in a third direction perpendicular to the first direction and the second direction. The plurality of first trenches are filled up with the resin member.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: November 29, 2022
    Assignee: ROHM CO., LTD.
    Inventor: Kazunori Fuji
  • Publication number: 20220302071
    Abstract: A semiconductor device includes a semiconductor element (30), an input lead, and first drive leads (60) connecting a source electrode of the semiconductor element (30) to the input lead. The first drive leads (60) are formed of a thin metal plate that is belt-shaped as viewed in a thickness-wise direction (Z). The first drive leads (60) include at least a metal plate (60A) connected to the semiconductor element (60) and a metal plate (60B) stacked on the metal plate (60A). The metal plate (60A) includes a first connector (61A) connected to the semiconductor element (30). The metal plate (60B) includes a first connector (61B) connected to the first connector (61A). The first connectors (61A, 61B) are stacked in the thickness-wise direction (Z).
    Type: Application
    Filed: May 28, 2020
    Publication date: September 22, 2022
    Inventor: Kazunori FUJI
  • Publication number: 20220230983
    Abstract: A semiconductor device includes an insulation layer, wires, a semiconductor element, and an encapsulation resin. The insulation layer includes a main surface and a back surface facing opposite in a thickness-wise direction and a side surface formed between the main surface and the back surface in the thickness-wise direction. The wires include an embedded portion embedded in the insulation layer and a redistribution portion formed of a metal film joined to the embedded portion and formed from the back surface to the side surface. The semiconductor element is mounted on the main surface and includes electrodes joined to at least part of the embedded portion of the wires. The encapsulation resin contacts the main surface and covers the semiconductor element.
    Type: Application
    Filed: May 25, 2020
    Publication date: July 21, 2022
    Inventor: Kazunori FUJI
  • Publication number: 20220199566
    Abstract: Semiconductor device A1 of the disclosure includes: semiconductor element 11 having element obverse surface 11a and element reverse surface 11b spaced apart from each other in z direction (first direction) with first region 111 formed on the element obverse surface 11a; metal plate 31 (electrode member) disposed on the element obverse surface 11a and electrically connected to the first region 111; electrically conductive substrate 22A (first conductive member) disposed to face the element reverse surface 11b and bonded to the semiconductor element 11; electrically conductive substrate 22B (second conductive member) spaced apart from the conductive substrate 22A (first conductive member); and lead member 5 (connecting member) electrically connecting the metal plate 31 (electrode member) and the conductive substrate 22B (second conductive member). The lead member 5 (connecting member) is bonded to the metal plate 31 (electrode member) by laser welding.
    Type: Application
    Filed: February 10, 2020
    Publication date: June 23, 2022
    Inventor: Kazunori FUJI
  • Publication number: 20220148922
    Abstract: A method for manufacturing a semiconductor device includes a step of preparing a semiconductor wafer source which includes a first main surface on one side, a second main surface on the other side and a side wall connecting the first main surface and the second main surface, an element forming step of setting a plurality of element forming regions on the first main surface of the semiconductor wafer source, and forming a semiconductor element at each of the plurality of element forming regions, and a wafer source separating step of cutting the semiconductor wafer source from a thickness direction intermediate portion along a horizontal direction parallel to the first main surface, and separating the semiconductor wafer source into an element formation wafer and an element non-formation wafer after the element forming step.
    Type: Application
    Filed: January 27, 2022
    Publication date: May 12, 2022
    Inventors: Masatoshi AKETA, Kazunori FUJI
  • Publication number: 20220148944
    Abstract: An electronic device A1 of the present disclosure includes an electronic component 1, a support member (die pad portion 21 of a lead frame 2) including a mount surface (obverse surface 211) carrying the electronic component 1, and a bonding material 3 provided between the electronic component 1 and the support member (die pad portion 21) for fixing the electronic component 1 to the support member (die pad portion 21). The mount surface (obverse surface 211) includes a first region 211a where a plurality of grooves 711 are formed and a second region 211b that surrounds the first region 211a as viewed in the z direction. The bonding material 3 is in contact with the first region 211a, and is not in contact with the second region 211b. This configuration serves to achieve an improvement in the reliability of the electronic device.
    Type: Application
    Filed: March 11, 2020
    Publication date: May 12, 2022
    Inventor: Kazunori FUJI
  • Patent number: 11264280
    Abstract: A method for manufacturing a semiconductor device includes a step of preparing a semiconductor wafer source which includes a first main surface on one side, a second main surface on the other side and a side wall connecting the first main surface and the second main surface, an element forming step of setting a plurality of element forming regions on the first main surface of the semiconductor wafer source, and forming a semiconductor element at each of the plurality of element forming regions, and a wafer source separating step of cutting the semiconductor wafer source from a thickness direction intermediate portion along a horizontal direction parallel to the first main surface, and separating the semiconductor wafer source into an element formation wafer and an element non-formation wafer after the element forming step.
    Type: Grant
    Filed: June 19, 2018
    Date of Patent: March 1, 2022
    Assignee: ROHM CO., LTD.
    Inventors: Masatoshi Aketa, Kazunori Fuji
  • Publication number: 20220037260
    Abstract: A semiconductor device A1 disclosed includes: a semiconductor element 10 having an element obverse face and element reverse face that face oppositely in a thickness direction z, with an obverse-face electrode 11 (first electrode 111) and a reverse-face electrode 12 respectively formed on the element obverse face and the element reverse face; a conductive member 22A opposing the element reverse face and conductively bonded to the reverse-face electrode 12; a conductive member 22B spaced apart from the conductive member 22A and electrically connected to the obverse-face electrode 11; and a lead member 51 having a lead obverse face 51a facing in the same direction as the element obverse face and connecting the obverse-face electrode 11 and the conductive member 22B. The lead member 51, bonded to the obverse-face electrode 11 via a lead bonding layer 321, includes a protrusion 521 protruding in the thickness direction z from the lead obverse face 51a.
    Type: Application
    Filed: September 30, 2019
    Publication date: February 3, 2022
    Inventor: Kazunori FUJI
  • Publication number: 20220028818
    Abstract: A semiconductor device includes an insulating layer, conductors, a semiconductor element and a sealing resin. The insulating layer has first and second surfaces opposite to each other in the thickness direction. Each conductor has an embedded part whose portion is embedded in the insulating layer and a redistribution part disposed at the second surface and connected to the embedded part. The semiconductor element has electrodes provided near the first surface and connected the embedded parts of the conductors. The semiconductor element is in contact with the first surface. The sealing resin partially covers the semiconductor element and is in contact with the first surface. The redistribution parts include portions outside the semiconductor element as viewed in the thickness direction. The insulating layer has grooves recessed from the second surface in the thickness direction. The redistribution parts are in contact with the grooves.
    Type: Application
    Filed: December 3, 2019
    Publication date: January 27, 2022
    Inventor: Kazunori FUJI