Patents by Inventor Kazunori Kodama

Kazunori Kodama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8451381
    Abstract: A image distortion correction unit which corrects a distortion of a projected image includes: a switching unit which operates in response to an operation signal from a Keystone remote controller button to switch correction by a trapezoidal distortion correction process and correction by a corner distortion correction process back and forth; a determination unit which determines whether any one of the correction by the trapezoidal distortion correction process and the correction by the corner distortion correction process has been performed; and a prohibition unit which prohibits switching the trapezoidal distortion correction process and the corner distortion correction process back and forth if the determination unit determines that any one of the correction by the trapezoidal distortion correction process and the correction by the corner distortion correction process has been performed and the operation signal is also received from the Keystone remote controller button.
    Type: Grant
    Filed: September 15, 2010
    Date of Patent: May 28, 2013
    Assignee: SANYO Electric Co., Ltd.
    Inventors: Naoki Kaise, Kazunori Kodama, Toshiyuki Watanabe, Takeshi Fujisaki
  • Publication number: 20110069235
    Abstract: A projector includes: an image signal processing circuit which receives and converts a first image signal to generate a second image signal representing an image to be projected; an image distortion correction unit which corrects the second image signal in response to a correction point on a projected image being changed by an operation done by a user; and an OSD circuit which operates, in response to an image distortion correction process being selected in response to an operation done by the user, to superpose a correction pattern used to allow the user to designate the correction point on the projected image, and thus display the correction pattern and the projected image on a single screen. The OSD circuit includes a switching control unit which switches a color used to display the correction pattern when the image distortion correction process is performed.
    Type: Application
    Filed: September 15, 2010
    Publication date: March 24, 2011
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Takeshi FUJISAKI, Naoki KAISE, Kazunori KODAMA
  • Publication number: 20110069234
    Abstract: A image distortion correction unit which corrects a distortion of a projected image includes: a switching unit which operates in response to an operation signal from a Keystone remote controller button to switch correction by a trapezoidal distortion correction process and correction by a corner distortion correction process back and forth; a determination unit which determines whether any one of the correction by the trapezoidal distortion correction process and the correction by the corner distortion correction process has been performed; and a prohibition unit which prohibits switching the trapezoidal distortion correction process and the corner distortion correction process back and forth if the determination unit determines that any one of the correction by the trapezoidal distortion correction process and the correction by the corner distortion correction process has been performed and the operation signal is also received from the Keystone remote controller button.
    Type: Application
    Filed: September 15, 2010
    Publication date: March 24, 2011
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Naoki KAISE, Kazunori KODAMA, Toshiyuki WATANABE, Takeshi FUJISAKI
  • Patent number: 5736972
    Abstract: A liquid crystal display apparatus includes first and second PLL circuits, a memory, and a liquid crystal panel. Dot data or line data of a video signal is written into the memory in response to a write clock signal from the first PLL circuit. Data are read from the memory in response to a read clock signal from the second PLL circuit. A read reset signal for reading dummy data is also supplied from the second PLL circuit to the memory. If the number of dot data the video signal has in one horizontal period is smaller than the number of horizontally arranged pixels of the liquid crystal panel, dummy data is read in response to the read reset signal after all the dot data in that one horizontal period have been read. On the other hand, if the number of line data in one vertical period is smaller than the number of vertically arranged pixels of the liquid crystal panel, dummy data is read in response to the read reset signal after all the line data in that one vertical period have been read.
    Type: Grant
    Filed: July 11, 1995
    Date of Patent: April 7, 1998
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Hirohisa Kitagishi, Kazunori Kodama