Patents by Inventor Kazunori Morimoto

Kazunori Morimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240085591
    Abstract: To provide a novel polarizing plate that suppresses poor appearance caused by thermal shrinkage of a polarizing film and is excellent in durability. There is provided a polarizing plate including: a polarizing film composed of a polyvinyl alcohol-based resin; and a translucent support substrate laminated on at least one surface of the polarizing film through a bonding layer, in which the bonding layer is composed of a molecular bonding agent that bonds the polarizing film and the support substrate by a chemical bond.
    Type: Application
    Filed: January 26, 2022
    Publication date: March 14, 2024
    Inventors: Keisuke GOTO, Kazunori NOMA, Hiroyuki MORIMOTO, Takahisa YANO
  • Patent number: 10164197
    Abstract: An organic electroluminescent device having improved emission efficiency includes an anode, an emission layer, an anode-side hole transport layer between the anode and the emission layer and mainly including an electron accepting material, a middle hole transport material layer between the anode-side hole transport layer and the emission layer and including a middle hole transport material, and an emission layer-side hole transport layer between the middle hole transport material layer and the emission layer, adjacent to the emission layer and including an emission layer-side hole transport material represented by the following Formula 1.
    Type: Grant
    Filed: March 22, 2016
    Date of Patent: December 25, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Kazunori Morimoto, Naoya Sakamoto, Ichinori Takada
  • Patent number: 10029981
    Abstract: The present invention provides a process for producing a perfluoropolyoxyalkylene peroxide compound comprising a step of reacting a perfluoroalkene with oxygen, wherein the reaction of the perfluoroalkene with oxygen is performed in a microreactor.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: July 24, 2018
    Assignee: DAIKIN INDUSTRIES, LTD.
    Inventors: Keiichirou Watanabe, Hideki Nakaya, Motohisa Shino, Tatsuya Takakuwa, Kazunori Morimoto
  • Patent number: 9944595
    Abstract: The present invention provides a process for producing a perfluoropolyoxyalkylene peroxide compound comprising a step of reacting a perfluoroalkene with oxygen, wherein the reaction of the perfluoroalkene with oxygen is performed under ultraviolet irradiation and in the presence of a fluorine source.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: April 17, 2018
    Assignee: DAIKIN INDUSTRIES, LTD.
    Inventors: Keiichirou Watanabe, Hideki Nakaya, Motohisa Shino, Tatsuya Takakuwa, Kazunori Morimoto
  • Publication number: 20170166521
    Abstract: The present invention provides a process for producing a perfluoropolyoxyalkylene peroxide compound comprising a step of reacting a perfluoroalkene with oxygen, wherein the reaction of the perfluoroalkene with oxygen is performed under ultraviolet irradiation and in the presence of a fluorine source.
    Type: Application
    Filed: December 8, 2016
    Publication date: June 15, 2017
    Applicant: DAIKIN INDUSTRIES, LTD.
    Inventors: Keiichirou WATANABE, Hideki NAKAYA, Motohisa SHINO, Tatsuya TAKAKUWA, Kazunori MORIMOTO
  • Publication number: 20170166522
    Abstract: The present invention provides a process for producing a perfluoropolyoxyalkylene peroxide compound comprising a step of reacting a perfluoroalkene with oxygen, wherein the reaction of the perfluoroalkene with oxygen is performed in a microreactor.
    Type: Application
    Filed: December 8, 2016
    Publication date: June 15, 2017
    Applicant: DAIKIN INDUSTRIES, LTD.
    Inventors: Keiichirou WATANABE, Hideki NAKAYA, Motohisa SHINO, Tatsuya TAKAKUWA, Kazunori MORIMOTO
  • Publication number: 20160380197
    Abstract: An organic electroluminescent device having improved emission efficiency includes an anode, an emission layer, an anode-side hole transport layer between the anode and the emission layer and mainly including an electron accepting material, a middle hole transport material layer between the anode-side hole transport layer and the emission layer and including a middle hole transport material, and an emission layer-side hole transport layer between the middle hole transport material layer and the emission layer, adjacent to the emission layer and including an emission layer-side hole transport material represented by the following Formula 1.
    Type: Application
    Filed: March 22, 2016
    Publication date: December 29, 2016
    Inventors: Kazunori Morimoto, Naoya Sakamoto, Ichinori Takada
  • Patent number: 9384696
    Abstract: A display device includes a sensing driver, a memory, a first compensator, and a second compensator. The sensing driver measures a first voltage value applied to a light emitter in a pixels. The memory stores a second voltage value previously measured for the pixel. The first compensator calculates a temperature of the light emitter at a time of measuring the first voltage value, and compensates for the first voltage value based on the temperature. The second compensator compensates for input data for the pixel based on a voltage variation obtained from the temperature-compensated first voltage value and the second voltage value.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: July 5, 2016
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Takeshi Okuno, Kazunori Morimoto, Naoaki Komiya
  • Patent number: 9293594
    Abstract: A source and drain electrode layer (3s/3d) of an oxide TFT element (3) is formed by a first conductive layer. A gate electrode (3g) of the oxide TFT element (3) and a gate electrode (5g) of an a-Si TFT element (5) are formed by a single conductive layer, that is, a second conductive layer. A source and drain electrode layer (5s/5d) of the a-Si TFT element (5) is formed by a third conductive layer. The third conductive layer is formed above the second conductive layer in a thickness direction in which each conductive layer is stacked on an insulating substrate (2). Further, the first conductive layer is formed below the second conductive layer in the thickness direction. Therefore, it is possible to provide a circuit board that can have an improved degree of integration of transistor elements formed on the insulating substrate.
    Type: Grant
    Filed: March 17, 2014
    Date of Patent: March 22, 2016
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Jun Nishimura, Hideki Kitagawa, Atsuhito Murai, Hajime Imai, Shinya Tanaka, Mitsunori Imade, Tetsuo Kikuchi, Junya Shimada, Kazunori Morimoto
  • Patent number: 9111810
    Abstract: A circuit board (1) includes a plurality of transistor elements on an insulating substrate (2). At least one of the plurality of transistor elements is an oxide TFT (10) including, as a channel layer (11), an oxide semiconductor. At least one of the plurality of transistor elements is an a-SiTFT (20) (i) being different from the oxide TFT (10) in functions as circuit components and (ii) including, as a channel layer (21), an amorphous silicon semiconductor. The oxide TFT (10) is a top gate transistor, and the a-SiTFT (20) is a bottom gate transistor. This provides: a configuration that can (a) enhance the performance of the circuit board equipped with the TFTs differing in their respective functions as circuit components and (b) reduce the area necessary for mounting the TFTs; and a method for producing the circuit board.
    Type: Grant
    Filed: March 2, 2011
    Date of Patent: August 18, 2015
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hideki Kitagawa, Shinya Tanaka, Hajime Imai, Atsuhito Murai, Mitsunori Imade, Tetsuo Kikuchi, Kazunori Morimoto, Junya Shimada, Jun Nishimura
  • Patent number: 9087990
    Abstract: A method of fabricating an organic electroluminescence display device includes providing a substrate including a plurality of pixel regions, first electrodes, and a partition wall, the pixel regions including two pixel columns, providing a mask including openings and first inclined surfaces, the openings being at positions corresponding to the two pixel columns, each of the first inclined surfaces being inclined toward one of the openings and including a portion extending to a region between the two pixel columns, positioning the mask such that each of the openings faces a portion of one of the pixel regions, dropping a solution containing an organic electroluminescence material onto the first inclined surfaces such that the solution is supplied onto the first electrodes through the openings to coat the first electrodes, evaporating solvent from the solution to form an organic electroluminescence layer, and forming a second electrode on the organic electroluminescence layer.
    Type: Grant
    Filed: May 13, 2014
    Date of Patent: July 21, 2015
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Kazunori Morimoto
  • Publication number: 20150154910
    Abstract: A display device includes a sensing driver, a memory, a first compensator, and a second compensator. The sensing driver measures a first voltage value applied to a light emitter in a pixels. The memory stores a second voltage value previously measured for the pixel. The first compensator calculates a temperature of the light emitter at a time of measuring the first voltage value, and compensates for the first voltage value based on the temperature. The second compensator compensates for input data for the pixel based on a voltage variation obtained from the temperature-compensated first voltage value and the second voltage value.
    Type: Application
    Filed: November 25, 2014
    Publication date: June 4, 2015
    Inventors: Takeshi OKUNO, Kazunori MORIMOTO, Naoaki KOMIYA
  • Patent number: 8907938
    Abstract: A liquid crystal display device which can suppress generation of a locally luminous part where a dark line disappears. The display device includes: a pair of substrates, a liquid crystal layer sandwiched between the pair of substrates, wherein one of the pair of substrates includes a pair of electrodes in pixel. At least one of the electrodes may include a comb-tooth portion. A first comb-tooth portion of one of the pair of electrodes and a second comb-tooth portion of the other one of the pair of electrodes may be disposed to face each other. The distance between the pair of electrodes in a transverse direction of the comb-tooth portions of the pair of electrodes is at most 10 ?m in example embodiments, and a rotational viscosity of the p-type nematic liquid crystals may be at least 130 mPa·s.
    Type: Grant
    Filed: February 18, 2010
    Date of Patent: December 9, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kazunori Morimoto, Takehiko Sakai, Tetsuo Fujita, Dai Chiba, Katsuhiko Morishita, Tsuyoshi Okazaki
  • Publication number: 20140342482
    Abstract: A method of fabricating an organic electroluminescence display device includes providing a substrate including a plurality of pixel regions, first electrodes, and a partition wall, the pixel regions including two pixel columns, providing a mask including openings and first inclined surfaces, the openings being at positions corresponding to the two pixel columns, each of the first inclined surfaces being inclined toward one of the openings and including a portion extending to a region between the two pixel columns, positioning the mask such that each of the openings faces a portion of one of the pixel regions, dropping a solution containing an organic electroluminescence material onto the first inclined surfaces such that the solution is supplied onto the first electrodes through the openings to coat the first electrodes, evaporating solvent from the solution to form an organic electroluminescence layer, and forming a second electrode on the organic electroluminescence layer.
    Type: Application
    Filed: May 13, 2014
    Publication date: November 20, 2014
    Applicant: Samsung Display Co., Ltd.
    Inventor: Kazunori MORIMOTO
  • Patent number: 8877017
    Abstract: The present invention provides a novel method for separating hexafluoropropylene oxide (HFPO) from hexafluoropropylene (HFP), which is capable of reducing the burden on the environment. A mixture including HFPO and HFP is subjected to an extractive distillation operation using, as a solvent, at least one of a fluorine-containing saturated compound represented by the general formula CnHaFb (wherein n, a and b are integers which satisfy: n=3 to 8, 0?a?2n+1, and 1?b?2n+2) thereby separating into a first fraction including HFPO and a second fraction including HFP and the solvent. At least one of 1-bromopropane and 2-bromopropane may be u as the solvent in place of the fluorine-containing saturated compound.
    Type: Grant
    Filed: February 18, 2010
    Date of Patent: November 4, 2014
    Assignee: Daikin Industries, Ltd.
    Inventors: Hideki Nakaya, Kazuyoshi Ichihara, Yasuhide Senba, Mikio Nakagoshi, Kazunori Morimoto
  • Publication number: 20140197412
    Abstract: A source and drain electrode layer (3s/3d) of an oxide TFT element (3) is formed by a first conductive layer. A gate electrode (3g) of the oxide TFT element (3) and a gate electrode (5g) of an a-Si TFT element (5) are formed by a single conductive layer, that is, a second conductive layer. A source and drain electrode layer (5s/5d) of the a-Si TFT element (5) is formed by a third conductive layer. The third conductive layer is formed above the second conductive layer in a thickness direction in which each conductive layer is stacked on an insulating substrate (2). Further, the first conductive layer is formed below the second conductive layer in the thickness direction. Therefore, it is possible to provide a circuit board that can have an improved degree of integration of transistor elements formed on the insulating substrate.
    Type: Application
    Filed: March 17, 2014
    Publication date: July 17, 2014
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Jun NISHIMURA, Hideki KITAGAWA, Atsuhito MURAI, Hajime IMAI, Shinya TANAKA, Mitsunori IMADE, Tetsuo KIKUCHI, Junya SHIMADA, Kazunori MORIMOTO
  • Patent number: 8581257
    Abstract: The circuit board (1) of the present invention includes a plurality of transistor elements provided on a single insulating substrate (2) for respective pixels that are two-dimensionally arranged or respective pixels in a group of a predetermined number of the pixels. At least one of the plurality of transistor elements is an oxide TFT (10) having a channel layer (11) formed by an oxide semiconductor, and at least another of the plurality of transistor elements is an a-Si TFT (20) having a channel layer (21) formed by, for example, an amorphous silicon semiconductor. Each of the oxide TFT (10) and the a-Si TFT (20) is a bottom-gate transistor.
    Type: Grant
    Filed: January 17, 2011
    Date of Patent: November 12, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Atsuhito Murai, Shinya Tanaka, Hideki Kitagawa, Hajime Imai, Mitsunori Imade, Tetsuo Kikuchi, Kazunori Morimoto, Junya Shimada, Jun Nishimura
  • Publication number: 20130214279
    Abstract: A source and drain electrode layer (3s/3d) of an oxide TFT element (3) is formed by a first conductive layer. A gate electrode (3g) of the oxide TFT element (3) and a gate electrode (5g) of an a-Si TFT element (5) are formed by a single conductive layer, that is, a second conductive layer. A source and drain electrode layer (5s/5d) of the a-Si TFT element (5) is formed by a third conductive layer. The third conductive layer is formed above the second conductive layer in a thickness direction in which each conductive layer is stacked on an insulating substrate (2). Further, the first conductive layer is formed below the second conductive layer in the thickness direction. Therefore, it is possible to provide a circuit board that can have an improved degree of integration of transistor elements formed on the insulating substrate.
    Type: Application
    Filed: February 23, 2011
    Publication date: August 22, 2013
    Inventors: Jun Nishimura, Hideki Kitagawa, Atsuhito Murai, Hajime Imai, Shinya Tanaka, Mitsunori Imade, Tetsuo Kikuchi, Junya Shimada, Kazunori Morimoto
  • Patent number: 8508678
    Abstract: A liquid crystal display device includes an active matrix substrate (20a) including a plurality of first touch panel interconnects (19b) extending in parallel with each other, a counter substrate (30a) facing the active matrix substrate (20a) and including a plurality of second touch panel interconnects (25a) extending in parallel with each other in a direction intersecting the first touch panel interconnects (19b), a liquid crystal layer (40) provided between the active matrix substrate (20a) and the counter substrate (30a) with an alignment film (9a, 9b) being interposed between the liquid crystal layer (40) and each of the active matrix substrate (20a) and the counter substrate (30a), and a plurality of columnar touch pins (P) connected to the first or second touch panel interconnects (19b, 25a). Repellency to the alignment films (9a, 9b) is imparted to at least a portion of a top portion of each of the touch pins (P).
    Type: Grant
    Filed: June 17, 2009
    Date of Patent: August 13, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takehiko Sakai, Dai Chiba, Yoshiharu Kataoka, Takuya Watanabe, Shogo Nishiwaki, Kazunori Morimoto
  • Patent number: 8488621
    Abstract: At least one node on a network acquires boundary violation information and frame state information concerning a reception slot and adjacent slots. Based on the boundary violation information and frame state information concerning the slots, the node verifies an error factor in the reception slot. Based on verification of the error factor, the node determines that data of a frame received in the reception slot can be used. When determining that the data of the received frame can be used, the node uses the received frame for control.
    Type: Grant
    Filed: July 9, 2007
    Date of Patent: July 16, 2013
    Assignee: Nissan Motor Co., Ltd.
    Inventor: Kazunori Morimoto