Patents by Inventor Kazunori Nishikawa

Kazunori Nishikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4561083
    Abstract: A memory circuit write-in system comprises a first circuit for supplying a digital signal including a time base fluctuation component, where one frame of the digital signal is constituted by at least a synchronizing signal and information data and the digital signal has a first repetition frequency with a period of one frame of the digital signal, a memory circuit for writing therein and reading out therefrom the digital signal supplied from the first circuit, and a second circuit for applying a write-in control signal to the memory circuit. The write-in control signal includes no time base fluctuation component and has a second repetition frequency substantially equal to the first repetition frequency, and the memory circuit is controlled by the write-in control signal so that write-in of the digital signal is carried out with a write-in period in a range of two times within the one frame period.
    Type: Grant
    Filed: May 20, 1983
    Date of Patent: December 24, 1985
    Assignee: Victor Company of Japan, Ltd.
    Inventors: Kazunori Nishikawa, Yoshiki Iwasaki, Isao Masuda, Shoji Ueno, Makoto Komura, Nobuaki Takahashi
  • Patent number: 4516163
    Abstract: A digital information recording system comprises a randomized digital signal forming circuit for forming a randomized digital signal by carrying out modulo-2 addition of at least digital information signals of a plurality of channels in a digital signal and a random code sequence which is generated independently, a detector for successively detecting values of each of a predetermined number of words from each of the digital information signals of a plurality of channels in the randomized digital signal, in terms of one word, and generating a detection signal only when values of bits in the one word are all "1" or all "0", a timing circuit for generating a timing signal for every period corresponding to a transmission period of a least significant bit in one word from each of the digital information signals of a plurality of channels, a polarity inverting circuit for passing the randomized digital signal unchanged during a period in which the detection signal is not generated from the detector, and inverting t
    Type: Grant
    Filed: June 28, 1983
    Date of Patent: May 7, 1985
    Assignee: Victor Company of Japan
    Inventors: Isao Masuda, Nobuaki Takahashi, Kazunori Nishikawa, Yoshiki Iwasaki, Shoji Ueno
  • Patent number: 4509155
    Abstract: In a circuit arrangement for a disk player of the type arranged to reproduce information prerecorded in the form of pits, a variable gain circuit for changing the frequency characteristic of the reproduced signal is provided. The level of the reproduced signal is detected at high and low frequencies so as to produce a control signal the voltage of which varies in accordance with the difference between the level of the high frequency signal component and the level of the low frequency component. The control signal is then applied to the variable gain circuit receiving the reproduced signal so that the frequency characteristic of the reproduced signal will be controlled. Thus, the level of the reproduced signal is boosted at its high frequency range.
    Type: Grant
    Filed: May 28, 1982
    Date of Patent: April 2, 1985
    Assignee: Victor Company of Japan, Limited
    Inventors: Isao Masuda, Kazunori Nishikawa, Yoshiki Iwasaki, Makoto Komura
  • Patent number: 4360824
    Abstract: An information signal recording system comprises a circuit for generating pilot signals for tracking control, a circuit for generating a rectangular waveform signal of a specific frequency existing in an artificial synchronizing signal duration in every specific period and having almost no frequency component equal to and in the vicinity of the frequencies of the pilot signals, a circuit for pulse code modulating or difference modulating an information signal, further digital modulating the information signal, and obtaining a digital information signal existing in a time interval other than the artificial synchronizing signal duration. The digital information signal is recorded along a main track on a recording medium and the pilot signals are recorded along pilot signal tracks contiguous to the main track.
    Type: Grant
    Filed: February 21, 1980
    Date of Patent: November 23, 1982
    Assignee: Victor Company of Japan, Ltd.
    Inventors: Nobuaki Takahashi, Kazunori Nishikawa, Isao Masuda, Hideo Sato
  • Patent number: 4107478
    Abstract: An angle modulated wave demodulation system demodulates an input angle modulated wave by means of a phase locked loop system which comprises a phase comparator, which is operated responsive to an input angle modulated wave. A voltage controlled oscillator is supplied with a part of the output of the phase comparator which controls its oscillation frequency. The oscillator supplies its oscillation frequency to the phase comparator. The phase locked loop system has a lock frequency range which decreases its width when the level of the input angle modulated wave is below a predetermined level. The portion of this lock range in which the width of the lock range decreases is positively utilized. The voltage controlled oscillator oscillates at a frequency equal to the center frequency of the carrier of the input angle modulated wave, when the phase locked loop becomes unlocked.
    Type: Grant
    Filed: June 21, 1976
    Date of Patent: August 15, 1978
    Assignee: Victor Company of Japan, Limited
    Inventors: Nobuaki Takahashi, Kazunori Nishikawa, Yoshiki Iwasaki, Masaaki Satoh, Katsuhiro Ohba, Shinji Nakamura, Tatsuo Sawada, Nobuhide Ohsaki, Yasuo Itoh, Nobuaki Suda, Yasuhisa Okabe, Hideaki Ozaki
  • Patent number: 3983500
    Abstract: An angle modulated wave demodulation system demodulates an input angle modulated wave by means of a phase locked loop system which comprises a phase comparator, which is operated responsive to an input angle modulated wave. A voltage controlled oscillator is supplied with a part of the output of the phase comparator which controls its oscillation frequency. The oscillator supplies its oscillation frequency to the phase comparator. The phase locked loop system has a lock frequency range which decreases its width when the level of the input angle modulated wave is below a predetermined level. The portion of this lock range in which the width of the lock range decreases is positively utilized. The voltage controlled oscillator oscillates at a frequency equal to the center frequency of the carrier of the input angle modulated wave, when the phase locked loop becomes unlocked.
    Type: Grant
    Filed: September 3, 1974
    Date of Patent: September 28, 1976
    Assignee: Victor Company of Japan, Limited
    Inventors: Nobuaki Takahashi, Kazunori Nishikawa, Yoshiki Iwasaki, Masaaki Satoh, Katsuhiro Ohba, Shinji Nakamura, Tatsuo Sawada, Nobuhide Ohsaki, Yasuo Itoh, Nobuaki Suda, Yasuhisa Okabe, Hideaki Ozaki