Patents by Inventor Kazunori Okajima

Kazunori Okajima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10306255
    Abstract: A motion compensator includes a divider, a frame memory transfer controller, and a motion compensation processor. Based on information about a coding unit CU and prediction unit PU provided by a decoder, the divider determines whether or not to divide the PU. Next, based on a motion vector of the PU yet to be divided, reference image information, and information about divided blocks locations, the frame memory transfer controller determines the storage location of the reference image of a reference picture in a frame memory on the basis of each of the blocks divided, thereby obtaining reference image data. The motion compensation processor performs motion compensation operation on a motion compensation control block basis to generate a predicted image. Then, a reconstructor obtains a restored image based on a residual image generated by an inverse frequency transformer.
    Type: Grant
    Filed: September 23, 2016
    Date of Patent: May 28, 2019
    Assignee: SOCIONEXT INC.
    Inventors: Kazunori Okajima, Satoshi Yamaguchi
  • Publication number: 20170013270
    Abstract: A motion compensator includes a divider, a frame memory transfer controller, and a motion compensation processor. Based on information about a coding unit CU and prediction unit PU provided by a decoder, the divider determines whether or not to divide the PU. Next, based on a motion vector of the PU yet to be divided, reference image information, and information about divided blocks locations, the frame memory transfer controller determines the storage location of the reference image of a reference picture in a frame memory on the basis of each of the blocks divided, thereby obtaining reference image data. The motion compensation processor performs motion compensation operation on a motion compensation control block basis to generate a predicted image. Then, a reconstructor obtains a restored image based on a residual image generated by an inverse frequency transformer.
    Type: Application
    Filed: September 23, 2016
    Publication date: January 12, 2017
    Inventors: Kazunori OKAJIMA, Satoshi YAMAGUCHI
  • Publication number: 20140177726
    Abstract: A video decoding apparatus includes: a decoding unit which derives a flag regarding a motion vector from an encoded video stream; a comparing unit which determines whether or not motion vectors of adjacent blocks are equal to each other; a block combining unit which combines the adjacent blocks determined as being equal in motion vector, into one motion compensation block on which motion compensation is to be performed; a motion vector generating unit which generates a motion vector; a reference image obtaining unit which obtains a reference image corresponding to the motion compensation block from reference image data stored in a memory; a motion compensating unit which generates a prediction image corresponding to the motion compensation block; and an adder which reconstructs an image using the prediction image generated by the motion compensating unit.
    Type: Application
    Filed: February 26, 2014
    Publication date: June 26, 2014
    Applicant: PANASONIC CORPORATION
    Inventor: Kazunori OKAJIMA
  • Patent number: 8750388
    Abstract: A mutliview video decoding apparatus including: a decoding unit which decodes one of coded videos without reference to a coded video to generate one of decoded videos, and decodes an other one of coded videos with reference to the one of the coded videos to generate an other one of decoded videos; an error detecting unit which detests an error-source image in the decoded videos; and a decoded image replacing unit which replaces the error-source image with an image generated using a previous image that is decoded before the error-source image, without using the second decoded video that is other than the first decoded video that includes the error-source image, and replaces an associated error image that is associated with the error-source image with an image generated using an associated previous image that is associated with the error-source image, without using the first decoded video.
    Type: Grant
    Filed: August 2, 2011
    Date of Patent: June 10, 2014
    Assignee: Panasonic Corporation
    Inventor: Kazunori Okajima
  • Publication number: 20110286531
    Abstract: A mutliview video decoding apparatus including: a decoding unit which decodes one of coded videos without reference to a coded video to generate one of decoded videos, and decodes an other one of coded videos with reference to the one of the coded videos to generate an other one of decoded videos; an error detecting unit which detests an error-source image in the decoded videos; and a decoded image replacing unit which replaces the error-source image with an image generated using a previous image that is decoded before the error-source image, without using the second decoded video that is other than the first decoded video that includes the error-source image, and replaces an associated error image that is associated with the error-source image with an image generated using an associated previous image that is associated with the error-source image, without using the first decoded video.
    Type: Application
    Filed: August 2, 2011
    Publication date: November 24, 2011
    Applicant: Panasonic Corporation
    Inventor: Kazunori OKAJIMA
  • Patent number: 7707328
    Abstract: A data transfer request of a data pro cessing device with respect to a synchronous memory is divided by a burst transfer length unit request dividing section into a plurality of data transfer requests in which a data transfer amount is an amount of data to be burst-transferred at a time and the data to be burst-transferred at a time is within a single memory bank. An assembling section assembles the divided data transfer requests into a plurality of new data transfer requests obtained by combining the divided data transfer requests, one for each memory bank. A data processing device can efficiently access continuous data stored in a plurality of memory banks, and is useful as a memory access control circuit of controlling an access operation of a data processing device with respect to a synchronous memory.
    Type: Grant
    Filed: November 3, 2005
    Date of Patent: April 27, 2010
    Assignee: Panasonic Corporation
    Inventors: Kazunori Okajima, Yasuyuki Tomida, Kunihiro Kaida
  • Publication number: 20060218315
    Abstract: A data transfer request of a data processing device with respect to a synchronous memory is divided by a burst transfer length unit request dividing section into a plurality of data transfer requests in which a data transfer amount is an amount of data to be burst-transferred at a time and the data to be burst-transferred at a time is within a single memory bank. An assembling section assembles the divided data transfer requests into a plurality of new data transfer requests obtained by combining the divided data transfer requests, one for each memory bank.
    Type: Application
    Filed: November 3, 2005
    Publication date: September 28, 2006
    Inventors: Kazunori Okajima, Yasuyuki Tomida, Kunihiro Kaida