Patents by Inventor Kazunori Sakurai

Kazunori Sakurai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060028535
    Abstract: A line head includes an element substrate having light-emitting elements arrayed thereon and a sealing substrate that seals the light-emitting elements on the element substrate. A recess is formed on a portion of the substrate where light emitted from the light-emitting elements exits, and the recess is formed to include an entire region immediately above at least the light-emitting elements.
    Type: Application
    Filed: July 13, 2005
    Publication date: February 9, 2006
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Kazunori Sakurai
  • Publication number: 20050236983
    Abstract: A method for manufacturing an organic electroluminescent device having an organic functional layer formed between facing electrodes, the method includes forming separators which separate either of the electrodes into a strip, forming an electrode film between the separators with a vapor deposition method, and placing a further electrode material on the electrode film which is formed between the separators with the vapor deposition method.
    Type: Application
    Filed: April 11, 2005
    Publication date: October 27, 2005
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Hirofumi Sakai, Kazunori Sakurai
  • Patent number: 6918705
    Abstract: An optical module comprising: an optical fiber; an optical element having an optical section and with a fixed position relative to the optical fiber; and a semiconductor chip electrically connected to the optical element, and the optical element and semiconductor chip being packaged. A hole is formed in the semiconductor chip, and the optical element is mounted on the semiconductor chip with the optical section facing the hole, and the optical fiber is inserted in the hole and fitted to the semiconductor chip.
    Type: Grant
    Filed: August 5, 2003
    Date of Patent: July 19, 2005
    Assignee: Seiko Epson Corporation
    Inventors: Kazunori Sakurai, Kazushige Umetsu, Akihiro Murata
  • Publication number: 20050093784
    Abstract: Aspects of the invention provide an electro-optical device including first pixel portions each including an active element and second pixel portions each not including any active element, the first and second pixel portions being provided in an image display region of a substrate, a first driving device for driving the first pixel portions in an active driving method and a second driving device for driving the second pixel portions in a passive driving method. Accordingly, the invention can realize a display by using both an active driving method and a passive driving method with a simple structure.
    Type: Application
    Filed: August 9, 2004
    Publication date: May 5, 2005
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Kazunori Sakurai
  • Publication number: 20050040754
    Abstract: To provide a display device that applies a uniform driving voltage to each pixel and prevents light emitting regions from being narrower. In a display device obtained by bonding a pixel element substrate to a driving circuit board having a driving circuit for the plurality of pixel elements, the driving circuit board includes connecting terminals connected to the driving circuit for the plurality of pixel elements on the surface of the driving circuit board facing the pixel element substrate.
    Type: Application
    Filed: July 12, 2004
    Publication date: February 24, 2005
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Kazunori Sakurai
  • Patent number: 6846699
    Abstract: A method of manufacturing a semiconductor device comprises a step of mounting a semiconductor chip on a wiring substrate having a base substrate on which are formed interconnecting lines; while melting the base substrate, bumps provided to the semiconductor chip are pressed in, and the bumps are electrically connected to the interconnecting lines.
    Type: Grant
    Filed: November 14, 2001
    Date of Patent: January 25, 2005
    Assignee: Seiko Epson Corporation
    Inventor: Kazunori Sakurai
  • Publication number: 20040232572
    Abstract: An optical device includes a substrate having a through hole formed therein, and an optical element mounted on the substrate with its optical section being placed to face the through hole, and a light transmissive member disposed at the through hole. Light transmissive under-fill material is provided between the substrate and the optical element and between the light transmissive member and the optical element.
    Type: Application
    Filed: June 10, 2004
    Publication date: November 25, 2004
    Inventor: Kazunori Sakurai
  • Patent number: 6809020
    Abstract: The invention provides a method for readily forming a bump with a desired width, a semiconductor device and a method for making the same, a circuit board, and an electronic device. A method for forming a bump includes forming an opening in an insulating film which exposes at least a part of a pad, and forming the bump so as to be connected to the pad. A resist layer 20 defines a through hole which extends over at least a part of the pad in plan view. A metal layer is formed in the opening so as to connect to the exposed portion of the pad.
    Type: Grant
    Filed: April 30, 2001
    Date of Patent: October 26, 2004
    Assignee: Seiko Epson Corporation
    Inventors: Kazunori Sakurai, Tsutomu Ota, Fumiaki Matsushima, Akira Makabe
  • Patent number: 6765236
    Abstract: An optical device includes a substrate having a through hole formed therein, and an optical element mounted on the substrate with its optical section being placed to face the through hole, and a light transmissive member disposed at the through hole. Light transmissive under-fill material is provided between the substrate and the optical element and between the light transmissive member and the optical element.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: July 20, 2004
    Assignee: Seiko Epson Corporation
    Inventor: Kazunori Sakurai
  • Publication number: 20040028352
    Abstract: An optical module comprising: an optical fiber; an optical element having an optical section and with a fixed position relative to the optical fiber; and a semiconductor chip electrically connected to the optical element, and the optical element and semiconductor chip being packaged. A hole is formed in the semiconductor chip, and the optical element is mounted on the semiconductor chip with the optical section facing the hole, and the optical fiber is inserted in the hole and fitted to the semiconductor chip.
    Type: Application
    Filed: August 5, 2003
    Publication date: February 12, 2004
    Applicant: Seiko Epson Corporation
    Inventors: Kazunori Sakurai, Kazushige Umetsu, Akihiro Murata
  • Patent number: 6623178
    Abstract: An optical module comprising: an optical fiber; an optical element having an optical section and with a fixed position relative to the optical fiber; and a semiconductor chip electrically connected to the optical element, and the optical element and semiconductor chip being packaged. A hole is formed in the semiconductor chip, and the optical element is mounted on the semiconductor chip with the optical section facing the hole, and the optical fiber is inserted in the hole and fitted to the semiconductor chip.
    Type: Grant
    Filed: June 14, 2000
    Date of Patent: September 23, 2003
    Assignee: Seiko Epson Corporation
    Inventors: Kazunori Sakurai, Kazushige Umetsu, Akihiro Murata
  • Patent number: 6551918
    Abstract: A method of fabricating a semiconductor device including: a first step of bonding a conductive wire to any one of a plurality of electrodes of a semiconductor chip; a second step of tearing off the bonded conductive wire in such a manner that a part remains on one of the electrodes; a third step of pressing the part of the conductive wire remaining on the one of the electrodes, to form a bump having a head portion and a base portion; and, a fourth step of bonding a lead to the bump; wherein a distance D between an upper surface of the base portion of the bump and an upper surface of the head portion is such that: 0<D≦6 &mgr;m.
    Type: Grant
    Filed: November 13, 2001
    Date of Patent: April 22, 2003
    Assignee: Seiko Epson Corporation
    Inventors: Hideki Yuzawa, Kazunori Sakurai
  • Patent number: 6437453
    Abstract: A wire bonding method comprising: disposing a plurality of leads (20) aligned in an imaginary plane (P) around the periphery of a semiconductor chip (10) having a plurality of electrodes (12) aligned on an imaginary straight line (L1); bonding wires (30) to the electrodes (12); bending the wires (30) toward the leads (20) as viewed from a direction perpendicular to the imaginary plane (P); and bonding the wires (30) to the leads (20).
    Type: Grant
    Filed: October 26, 2000
    Date of Patent: August 20, 2002
    Assignee: Seiko Epson Corporation
    Inventors: Yugo Koyama, Kazunori Sakurai
  • Publication number: 20020088987
    Abstract: An optical device includes a substrate having a through hole formed therein, and an optical element mounted on the substrate with its optical section being placed to face the through hole, and a light transmissive member disposed at the through hole. Light transmissive under-fill material is provided between the substrate and the optical element and between the light transmissive member and the optical element.
    Type: Application
    Filed: December 21, 2001
    Publication date: July 11, 2002
    Inventor: Kazunori Sakurai
  • Publication number: 20020079594
    Abstract: A method of manufacturing a semiconductor device comprises a step of mounting a semiconductor chip on a wiring substrate having a base substrate on which are formed interconnecting lines; while melting the base substrate, bumps provided to the semiconductor chip are pressed in, and the bumps are electrically connected to the interconnecting lines.
    Type: Application
    Filed: November 14, 2001
    Publication date: June 27, 2002
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Kazunori Sakurai
  • Publication number: 20020072214
    Abstract: A method of fabricating a semiconductor device including: a first step of bonding a conductive wire to any one of a plurality of electrodes of a semiconductor chip; a second step of tearing off the bonded conductive wire in such a manner that a part remains on one of the electrodes; a third step of pressing the part of the conductive wire remaining on the one of the electrodes, to form a bump having a head portion and a base portion; and, a fourth step of bonding a lead to the bump; wherein a distance D between an upper surface of the base portion of the bump and an upper surface of the head portion is such that: 0<D≦6 &mgr;m.
    Type: Application
    Filed: November 13, 2001
    Publication date: June 13, 2002
    Applicant: Seiko Epson Corporation
    Inventors: Hideki Yuzawa, Kazunori Sakurai
  • Patent number: 6397376
    Abstract: A method of determining interconnect routes from a plurality of inner leads to lands 32 arranged in a matrix around the inner leads.
    Type: Grant
    Filed: May 16, 2000
    Date of Patent: May 28, 2002
    Assignee: Seiko Epson Corporation
    Inventors: Kazunori Sakurai, Susumu Naitoh
  • Patent number: 6335568
    Abstract: A method of fabricating a semiconductor device including: a first step of bonding a conductive wire to any one of a plurality of electrodes of a semiconductor chip; a second step of tearing off the bonded conductive wire in such a manner that a part remains on one of the electrodes; a third step of pressing the part of the conductive wire remaining on the one of the electrodes, to form a bump having a head portion and a base portion; and, a fourth step of bonding a lead to the bump; wherein a distance D between an upper surface of the base portion of the bump and an upper surface of the head portion is such that: 0<D≦6 &mgr;m.
    Type: Grant
    Filed: October 25, 1999
    Date of Patent: January 1, 2002
    Assignee: Seiko Epson Corporation
    Inventors: Hideki Yuzawa, Kazunori Sakurai
  • Publication number: 20010040290
    Abstract: The invention provides a method for readily forming a bump with a desired width, a semiconductor device and a method for making the same, a circuit board, and an electronic device. A method for forming a bump includes forming an opening in an insulating film which exposes at least a part of a pad, and forming the bump so as to be connected to the pad. A resist layer 20 defines a through hole which extends over at least a part of the pad in plan view. A metal layer is formed in the opening so as to connect to the exposed portion of the pad.
    Type: Application
    Filed: April 30, 2001
    Publication date: November 15, 2001
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Kazunori Sakurai, Tsutomu Ota, Fumiaki Matsushima, Akira Makabe
  • Patent number: 6078104
    Abstract: A film, on which external electrodes and wire leads are disposed, is divided into two regions. A first region in which an integrated circuit element is disposed and a second region external to the first region. Connection holes are provided in a border area between the first and second regions for connecting the integrated circuit element and electrodes. External electrodes are provided on the first and second regions for connecting to an external substrate. The external electrodes are disposed to form a common matrix. When connecting external electrodes to an external substrate, connections to the external substrate are made in a region corresponding to an integrated circuit element.
    Type: Grant
    Filed: February 9, 1998
    Date of Patent: June 20, 2000
    Assignee: Seiko Epson Corporation
    Inventor: Kazunori Sakurai