Abstract: A first impedance control circuit includes a plurality of capacitors connected in parallel with a first transistor, and a second impedance control circuit includes a plurality of capacitors connected in parallel with a second transistor. Capacitors in the first impedance control circuit respectively have different capacitance values, and capacitors in the second impedance control circuit respectively have different capacitance values. The respective self-resonance frequencies of the capacitors in the first impedance control circuit differ, and the respective self-resonance frequencies of the capacitors in the second impedance control circuit differ. Switching noises each having a plurality of frequencies generated from first and second transistors are respectively absorbed in a power supply terminal and a ground terminal through the first and second impedance control circuits.

Abstract: A voice circuit is arranged on a chassis member. The voice circuit comprises a voice output amplifier and a high-frequency bypass unit. An output terminal of the voice output amplifier is connected to one end of a voice coil in a speaker through an interconnection, and is grounded through a high-frequency bypass unit. The voice output amplifier supplies a voice current to the voice coil through an interconnection. The resonance frequency of the high-frequency bypass unit is set to the same frequency as that of a discharge current flowing in the chassis member. A high-frequency induced current generated in the voice circuit due to the discharge current flowing in the chassis member flows to a ground terminal through the high-frequency bypass unit.

Abstract: A flat-panel display unit is provided which includes: a PDP; an aluminum chassis that is attached to the PDP; an upper data driver substrate and a signal processing substrate that are attached to the aluminum chassis; and a flexible cable that connects the substrates electrically. Between the substrates, a pressing plate fixes at least one part of the flexible cable, so that the space between the flexible cable and the aluminum chassis remains unchanged. Thereby, a stray capacitor can be stably formed using the insulating material of the flexible cable, and a high-frequency noise can be effectively reduced.

Abstract: A first impedance control circuit (41) includes a plurality of capacitors connected in parallel with a first transistor (Q1), and a second impedance control circuit (42) includes a plurality of capacitors connected in parallel with a second transistor (Q2). Capacitors (C11 . . . C1n) in the first impedance control circuit (41) respectively have different capacitance values, and capacitors (C21 . . . C2n) in the second impedance control circuit (42) respectively have different capacitance values. The respective self-resonance frequencies of the capacitors in the first impedance control circuit (41) differ, and the respective self-resonance frequencies of the capacitors in the second impedance control circuit (42) differ. Switching noises each having a plurality of frequencies generated from first and second transistors (Q1, Q2) are respectively absorbed in a power supply terminal and a ground terminal through the first and second impedance control circuits (41, 42).

Abstract: A voice circuit is arranged on a chassis member. The voice circuit comprises a voice output amplifier and a high-frequency bypass unit. An output terminal of the voice output amplifier is connected to one end of a voice coil in a speaker through an interconnection, and is grounded through a high-frequency bypass unit. The voice output amplifier supplies a voice current to the voice coil through an interconnection. The resonance frequency of the high-frequency bypass unit is set to the same frequency as that of a discharge current flowing in the chassis member. A high-frequency induced current generated in the voice circuit due to the discharge current flowing in the chassis member flows to a ground terminal through the high-frequency bypass unit.

Abstract: A vertical deflection apparatus supplies a vertical deflection current to a vertical deflection coil to deflect an electron beam in the vertical direction of a screen. The apparatus includes: a vertical deflection current output circuit that outputs a vertical deflection current; a correction circuit that outputs a correction signal periodically changing in a parabolic shape in a horizontal scanning period to correct a north-south pincushion distortion; a modulation circuit that modulates the phase of the correction signal output from the correction circuit in a vertical scanning period; and a superimposition device that superimposes a correction current based on an output signal of the modulation circuit on the vertical deflection current.

Abstract: A flat-panel display unit is provided which includes: a PDP 10; an aluminum chassis 2 that is attached to the PDP 10; an upper data driver substrate 6 and a signal processing substrate 7 that are attached to the aluminum chassis 2; and a flexible cable 8 that connects the substrates 6, 7 electrically. Between the substrates 6, 7, a pressing plate 9 fixes at least one part of the flexible cable 8, so that the space between the flexible cable 8 and the aluminum chassis 2 remains unchanged. Thereby, a stray capacitor can be stably formed using the insulating material of the flexible cable 8, and a high-frequency noise can be effectively reduced.

Abstract: A write PLL circuit generates a write clock signal for writing a video signal into a line memory. A readout PLL circuit generates a read clock signal for reading out the video signal stored in the line memory. An inner pincushion distortion correction voltage generation circuit modulates a correction waveform in the horizontal scanning period of time by a correction waveform in the vertical scanning period of time, to generate an inner pincushion distortion correction waveform, and adds a DC correction pulse to the inner pincushion distortion correction waveform and outputs the inner pincushion distortion correction waveform as an inner pincushion distortion correction voltage. A capacitive coupling circuit superimposes the inner pincushion distortion correction voltage on an output voltage of a loop filter of the readout PLL circuit, and feeds the inner pincushion distortion correction voltage to a VCO as a control voltage.

Abstract: A video display apparatus comprises a luminance signal processing circuit, a color-difference signal processing circuit, an RGB matrix circuit, a CRT drive circuit, a plurality of VM coils, a plurality of scanning-speed modulation circuit blocks, a horizontal deflection circuit, a vertical deflection circuit, a horizontal deflection coil, and a vertical deflection coil. An electron beam emitted inside the CRT by the CRT drive circuit is scanned horizontally and vertically by the horizontal deflection coil and the vertical deflection coil. Velocity modulation currents are supplied to the plurality of VM coils by the plurality of scanning-speed modulation circuit blocks. This results in the generation of velocity modulation magnetic fields from the plurality of VM coils, thereby partially modulating the velocity of the horizontally scanned electron beam.

Abstract: A vertical deflection apparatus supplies a vertical deflection current to a vertical deflection coil to deflect an electron beam in the vertical direction of a screen. The apparatus includes: a vertical deflection current output circuit that outputs a vertical deflection current; a correction circuit that outputs a correction signal periodically changing in a parabolic shape in a horizontal scanning period to correct a north-south pincushion distortion; a modulation circuit that modulates the phase of the correction signal output from the correction circuit in a vertical scanning period; and a superimposition device that superimposes a correction current based on an output signal of the modulation circuit on the vertical deflection current.

Abstract: A parabolic modulation circuit multiples a horizontal parabolic signal and a vertical modulation signal together, to amplitude-modulate the horizontal parabolic signal using the vertical modulation signal, and modulates the phase of the horizontal parabolic signal on the basis of the vertical modulation signal, to output the modulated horizontal parabolic signal to a correction current output amplifier. When an NS pincushion distortion on a screen of a CRT is asymmetrical, a horizontal parabolic signal generation circuit is so set as to generate an asymmetrical horizontal parabolic signal. A gull-wing distortion can be corrected by adjusting the value of n in an n-th power waveform generator in the horizontal parabolic signal generation circuit.

Abstract: A parabolic modulation circuit multiples a horizontal parabolic signal and a vertical modulation signal together, to amplitude-modulate the horizontal parabolic signal using the vertical modulation signal, and modulates the phase of the horizontal parabolic signal on the basis of the vertical modulation signal, to output the modulated horizontal parabolic signal to a correction current output amplifier. When an NS pincushion distortion on a screen of a CRT is asymmetrical, a horizontal parabolic signal generation circuit is so set as to generate an asymmetrical horizontal parabolic signal. A gull-wing distortion can be corrected by adjusting the value of n in an n-th power waveform generator in the horizontal parabolic signal generation circuit.

Abstract: A write PLL circuit generates a write clock signal for writing a video signal into a line memory. A readout PLL circuit generates a read clock signal for reading out the video signal stored in the line memory. An inner pincushion distortion correction voltage generation circuit modulates a correction waveform in the horizontal scanning period of time by a correction waveform in the vertical scanning period of time, to generate an inner pincushion distortion correction waveform, and adds a DC correction pulse to the inner pincushion distortion correction waveform and outputs the inner pincushion distortion correction waveform as an inner pincushion distortion correction voltage. A capacitive coupling circuit superimposes the inner pincushion distortion correction voltage on an output voltage of a loop filter of the readout PLL circuit, and feeds the inner pincushion distortion correction voltage to a VCO as a control voltage.

Abstract: A primary winding of a transformer is serially connected to a horizontal deflection coil. An amplitude regulating circuit outputs a first correction voltage in response to a voltage generated on a secondary winding of the transformer. A phase regulating circuit regulates the phase of the first correction voltage output from the amplitude regulating circuit and outputs a second correction voltage. An addition circuit adds the second correction voltage to a sawtooth wave voltage generated by a sawtooth wave voltage generation circuit. A correction current output from an amplifier in response to the second correction voltage output from the phase regulating circuit cancels a current component generated on a vertical deflection coil by a horizontal deflection current.

Abstract: A multilayer feedthrough capacitor of the present invention has an internal structure of stacking one over another alternately dielectric sheets 1a, on each of which signal feedthrough electrodes 2a, 2b and 2c and separating earth electrodes 7a and 7b are disposed alternately, and dielectric sheets 1b, on each of which earth electrodes 3a and 3b having protrusions 8a and 8b, respectively, are formed. On one pair of the end surfaces of this stacked dielectric body are formed first external electrodes 4a, 4b and 4c that are connected to signal feedthrough electrodes 2a, 2b and 2c, respectively, and third external electrodes 9a and 9b that are connected to both separating earth electrodes 7a and 7b and protrusions 8a and 8b, respectively. On the other pair of the end surfaces are formed second external electrodes 5a and 5b that are connected to earth electrodes 3a and 3b, respectively.

Abstract: A reduced size three-terminal type capacitor for removing jamming signals from an electrical signal. The three-terminal type capacitor comprises a ceramic substrate with a first ground electrode layer formed on the ceramic substrate, and a first dielectric layer formed on the first ground electrode layer. On the first dielectric layer reaching at least from one end of the first dielectric layer to the other end is a signal electrode. A second dielectric layer is formed on the first dielectric layer to surround the signal electrode together with the first dielectric layer, and a second ground electrode layer is formed on the second dielectric layer together with the first ground electrode layer. The second ground electrode layer is electrically connected to the first ground electrode layer. The structure of this three-terminal capacitor is such that first and second conductive layers (i.e.

Abstract: A reduced size three-terminal type capacitor for removing jamming signals from an electrical signal. The three-terminal type capacitor comprises a ceramic substrate with a first ground electrode layer formed on the ceramic substrate, and a first dielectric layer formed on the first ground electrode layer. On the first dielectric layer reaching at least from one end of the first dielectric layer to the other end is a signal electrode. A second dielectric layer is formed on the first dielectric layer to surround the signal electrode together with the first dielectric layer, and a second ground electrode layer is formed on the second dielectric layer together with the first ground electrode layer. The second ground electrode layer is electrically connected to the first ground electrode layer. The structure of this three-terminal capacitor is such that first and second conductive layers (i.e.

Abstract: A clock reproducing circuit for improving S/N of a PWM D/A converter is provided with a first clock reproducing portion (11) employing a crystal (11a) and a voltage controlled oscillator (11b) and with a second clock reproducing portion (12) for performing a frequency multiplication of an output signal of the first clock reproducing portion (11) to generate a proper clock signal. The second clock reproducing portion (12) consists of a phase comparator (22), loop filter, a resistance capacitance type voltage controlled oscillator (26) and a frequency divider (25).

Abstract: A clock producing apparatus for a D/A converter switches the clocks in accordance with the inputted sampling frequencies. A deterioration in the S/N caused by unnecessary spectra which are caused by the inputting of different sampling frequencies is prevented.The selecting operation is effected by the selecting circuit so as to obtain the selected input sampling frequencies, and at the same time, the clock signals are prevented from being inputted to the frequency dividing circuits corresponding to the input sampling frequencies which are not selected. Therefore, unnecessary spectra are prevented from being generated.

Abstract: In a parabolic signal generator, a sync pulse is applied to a saw-tooth wave generation circuit, the output of the saw-tooth wave generation circuit is entered to an absolute value circuit, the output of the absolute value circuit is entered to a logarithmic amplifier, the output of the logarithmic amplifier is entered to a linear amplifier, and the output of the linear amplifier is entered to an antilogarithmic amplifier. The absolute value circuit, logarithmic amplifier, linear amplifier and antilogarithmic amplifier are powered by a single-voltage power source, and these circuit and appliers have reference input terminals supplied with a common bias voltage.