Patents by Inventor Kazuo Endou

Kazuo Endou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5929488
    Abstract: Formed on a grounded semiconductor substrate, via an insulation layer, is a semiconductor layer of the same conductive type as that of the substrate. Formed on the semiconductor layer are source and drain regions of the different conductive type from that of the substrate. The drain region is formed so that its portion reaches the insulation layer. A gate insulation film is formed on the semiconductor layer and a gate electrode is formed on the gate insulation film and between the source and drain regions. A conductive member is embedded in a through hole formed from a portion of the semiconductor layer to the semiconductor substrate via the insulation layer. A source electrode is formed so that the conductive member in the through hole and the source region are connected to each other by means of the source electrode. A drain electrode is connected to the drain region.
    Type: Grant
    Filed: December 12, 1996
    Date of Patent: July 27, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kazuo Endou
  • Patent number: 5204735
    Abstract: High-frequency transistors are formed on a semiconductor substrate. Each transistor includes an emitter having a fish-bone structure, a base formed to surround the emitter, and a base lead region connected to the base. A resistor layer having the same conductivity type as that of the base lead region, and an impurity concentration and a junction depth equal to those of the base lead region is formed in the substrate. An emitter electrode is connected to the emitter and the resistor layer. A portion of the emitter electrode connected to the resistor layer has an interdigital structure, and is connected to the resistor layer at two or more contact surface portions or an interdigital surface portion. An electrode on the wiring layer side is connected to the resistor layer. A portion of the electrode connected to the resistor layer has an interdigital structure which matches with the interdigital structure of the emitter electrode.
    Type: Grant
    Filed: May 7, 1991
    Date of Patent: April 20, 1993
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomohiko Yamamoto, Kazuo Endou, Takashi Kimura