Patents by Inventor Kazuo Fujimura

Kazuo Fujimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240091775
    Abstract: One object of the present invention is to provide a method or apparatus for purifying target particles from high-concentration particles in a short time. The above problem can be solved by a method for purifying target particles, characterized in that the method comprises a step of sorting the target particles from a high concentration of non-target particles, wherein the sorting step is repeated for three times or more.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Applicant: ON-CHIP BIOTECHNOLOGIES CO., LTD.
    Inventors: Kazuo TAKEDA, Masayuki ISHIGE, Yuu FUJIMURA, Takahide INO, Yuji MORISHITA, Kosuke OSAWA, Soichiro TSUDA
  • Publication number: 20230253233
    Abstract: A semiconductor manufacturing apparatus includes first and second stages and a peripheral edge holder. The first stage supports a wafer with a resin sheet interposed. The wafer is separated into a central part and a peripheral edge part on the resin sheet. The first stage supports the central part of the wafer. The second stage surrounds the first stage and fixes an outer circumference part of the resin sheet. The outer circumference part is positioned outward of the first stage. The second stage is movable relative to the first stage to apply tension to the outer circumference part of the resin sheet. The peripheral edge holder holds the peripheral edge part of the wafer. The first and second stages move relative to each other so that the tension peels the resin sheet from the peripheral edge part of the wafer fixed to the peripheral edge holder.
    Type: Application
    Filed: September 2, 2022
    Publication date: August 10, 2023
    Inventors: Shinji NUNOTANI, Kazuo FUJIMURA
  • Publication number: 20210006114
    Abstract: A rotor has a rotor core. The rotor core has a cylindrical outer cylinder and a bottom plate that extends to one end of the outer cylinder. The bottom plate has a through hole penetrating the bottom plate. The rotor has a partition member. The partition member divides the through hole into a first region and a second region. The partition member crosses over the through hole. The rotary electric machine uses a flow in the first region and a flow in the second region.
    Type: Application
    Filed: September 23, 2020
    Publication date: January 7, 2021
    Inventors: Kazuo FUJIMURA, Ryouichi TANAKA, Takeshi YANAGISAWA
  • Patent number: 10784165
    Abstract: According to an embodiment, a semiconductor device includes a silicon substrate, a device layer, and a lower layer. The device layer is formed on an upper surface of the silicon substrate. The lower layer is formed on a lower surface of the silicon substrate and has a side surface connecting to a side surface of the silicon substrate. At least a pair of side surfaces of the semiconductor device has a curved shape widening from an upper side toward a lower side.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: September 22, 2020
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Shingo Masuko, Kazuo Fujimura, Yoshiharu Takada, Ichiro Mizushima
  • Publication number: 20190267288
    Abstract: According to an embodiment, a semiconductor device includes a silicon substrate, a semiconductor layer, and a lower layer. The semiconductor layer is formed on an upper surface of the silicon substrate. The lower layer is formed on a lower surface of the silicon substrate and has a side surface connecting to a side surface of the silicon substrate. At least a pair of side surfaces of the semiconductor device has a curved shape widening from an upper side toward a lower side.
    Type: Application
    Filed: March 12, 2018
    Publication date: August 29, 2019
    Inventors: Shingo Masuko, Kazuo Fujimura, Yoshiharu Takada, Ichiro Mizushima
  • Patent number: 9953894
    Abstract: A semiconductor device including: a semiconductor element, a substrate having a first surface on which the semiconductor element is provided, and a second surface located opposite the first surface, a metal species provided on the second surface, and a plated metal portion provided at least in part on the second surface on the metal species. The semiconductor device further includes a first region where the plated metal portion is provided and a second region where the plated metal portion is not provided are alternately arranged at a peripheral portion of the second surface.
    Type: Grant
    Filed: March 1, 2017
    Date of Patent: April 24, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shingo Masuko, Yoshiharu Takada, Kazuo Fujimura
  • Publication number: 20180082918
    Abstract: A semiconductor device including: a semiconductor element, a substrate having a first surface on which the semiconductor element is provided, and a second surface located opposite the first surface, a metal species provided on the second surface, and a plated metal portion provided at least in part on the second surface on the metal species. The semiconductor device further includes a first region where the plated metal portion is provided and a second region where the plated metal portion is not provided are alternately arranged at a peripheral portion of the second surface.
    Type: Application
    Filed: March 1, 2017
    Publication date: March 22, 2018
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shingo MASUKO, Yoshiharu TAKADA, Kazuo FUJIMURA
  • Patent number: 9887328
    Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a sealing member configured to cover a lower surface of the semiconductor layer and a side surface of the semiconductor layer to protrude to be higher than an upper surface of the semiconductor layer at a side of the semiconductor layer, a fluorescer layer provided above the semiconductor layer and the sealing member, and an insulating film provided between the sealing member and the semiconductor layer and between the sealing member and the fluorescer layer. A corner of a protruding portion of the sealing member is rounded.
    Type: Grant
    Filed: July 10, 2014
    Date of Patent: February 6, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki Tomizawa, Akihiro Kojima, Miyoko Shimada, Yosuke Akimoto, Hideko Mukaida, Mitsuyoshi Endo, Hideto Furuyama, Yoshiaki Sugizaki, Kazuo Fujimura, Shinya Ito, Shinji Nunotani
  • Patent number: 9444017
    Abstract: According to one embodiment, the second insulating film is provided between the first interconnect portion and the second interconnect portion, and at an outer periphery of a side face of the semiconductor layer. The optical layer is provided on the first side, and on the second insulating film at the outer periphery. The optical layer is transmissive with respect to light emitted from the light emitting layer. The film is provided between the second insulating film at the outer periphery and the optical layer. The film has a roughened surface on a side in contact with the optical layer.
    Type: Grant
    Filed: September 9, 2014
    Date of Patent: September 13, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shinji Nunotani, Kazuo Fujimura, Shinya Ito
  • Patent number: 9224919
    Abstract: According to one embodiment, the second insulating film is provided between the first interconnect portion and the second interconnect portion, and at an outer periphery of a side face of the semiconductor layer. The optical layer is provided on the first side and on the second insulating film at the outer periphery. The optical layer is transmissive with respect to light emitted from the light emitting layer. A plurality of protrusions and a plurality of recesses are provided at the first side. Peaks of the protrusions are positioned closer to the second side than an end on the second insulating film side of the optical layer at the outer periphery.
    Type: Grant
    Filed: September 9, 2014
    Date of Patent: December 29, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuo Fujimura, Hironori Yamasaki, Tadashi Ono, Shinsaku Kubo, Shinji Nunotani
  • Publication number: 20150280072
    Abstract: According to one embodiment, the second insulating film is provided between the first interconnect portion and the second interconnect portion, and at an outer periphery of a side face of the semiconductor layer. The optical layer is provided on the first side, and on the second insulating film at the outer periphery. The optical layer is transmissive with respect to light emitted from the light emitting layer. The film is provided between the second insulating film at the outer periphery and the optical layer. The film has a roughened surface on a side in contact with the optical layer.
    Type: Application
    Filed: September 9, 2014
    Publication date: October 1, 2015
    Inventors: Shinji Nunotani, Kazuo Fujimura, Shinya Ito
  • Publication number: 20150280066
    Abstract: According to one embodiment, the second insulating film is provided between the first interconnect portion and the second interconnect portion, and at an outer periphery of a side face of the semiconductor layer. The optical layer is provided on the first side and on the second insulating film at the outer periphery. The optical layer is transmissive with respect to light emitted from the light emitting layer. A plurality of protrusions and a plurality of recesses are provided at the first side. Peaks of the protrusions are positioned closer to the second side than an end on the second insulating film side of the optical layer at the outer periphery.
    Type: Application
    Filed: September 9, 2014
    Publication date: October 1, 2015
    Inventors: Kazuo Fujimura, Hironori Yamasaki, Tadashi Ono, Shinsaku Kubo, Shinji Nunotani
  • Publication number: 20150069437
    Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a sealing member configured to cover a lower surface of the semiconductor layer and a side surface of the semiconductor layer to protrude to be higher than an upper surface of the semiconductor layer at a side of the semiconductor layer, a fluorescer layer provided above the semiconductor layer and the sealing member, and an insulating film provided between the sealing member and the semiconductor layer and between the sealing member and the fluorescer layer. A corner of a protruding portion of the sealing member is rounded.
    Type: Application
    Filed: July 10, 2014
    Publication date: March 12, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki TOMIZAWA, Akihiro KOJIMA, Miyoko SHIMADA, Yosuke AKIMOTO, Hideko MUKAIDA, Mitsuyoshi ENDO, Hideto FURUYAMA, Yoshiaki SUGIZAKI, Kazuo FUJIMURA, Shinya ITO, Shinji NUNOTANI
  • Patent number: 3946798
    Abstract: A cast piece guide roll segment in continuous casting equipment having a curved cast piece guide path which is used in the structure for supporting the roll groups in the respective curved portions for guiding the cast piece leaving the mold along the curve between the vertical and horizontal paths. In view of the problems inherent in continuous casting equipment such as the need for frequent roll changes and emergency shut-downs, the roll segment disclosed includes roll units having at least a pair of rolls and bearings provided at opposite ends thereof and removable from a frame, on which frame are mounted pivotable caps for holding roll units.
    Type: Grant
    Filed: April 10, 1974
    Date of Patent: March 30, 1976
    Assignee: Kobe Steel, Ltd.
    Inventors: Yoshikazu Uchimoto, Kazuo Fujimura