Abstract: A low-voltage detection circuit detects a low voltage using a voltage follower type operational amplifier and an A/D converter instead of a conventional low-voltage detection circuit. That is, a reference voltage is applied from a reference voltage generating circuit to the A/D converter through the voltage follower type operational amplifier. The voltage follower type operational amplifier is used to reduce output impedance. The power supply voltage can be detected by a converted value (a digital value) from the A/D converter since the reference voltage is independent of the power supply voltage and the converted value varies depending on the power supply voltage. The converted value (the digital value) from the A/D converter is set in a register and statuses of a microcomputer are set as in the conventional art, using the converted value as a flag.

Abstract: A low-voltage detection reset circuit that suppresses a current consumption in a stand-by mode and is reduced in a size is offered. The low-voltage detection reset circuit is provided with a power-on reset circuit that operates only at power-on and outputs a reset pulse and is configured to set a detection level of a detection level setting circuit at a default value using the reset pulse and to activate a programmable low-voltage detection circuit. After the programmable low-voltage detection circuit is activated, a detection level of the programmable low-voltage detection circuit can be modified from the default value by a register.

Abstract: A low-voltage detection circuit that is small in size and accurate in detecting a reduction in a power supply voltage is offered. The low-voltage detection circuit of an embodiment of this invention detects a low voltage using a voltage follower type operational amplifier and an A/D converter instead of a conventional low-voltage detection circuit. That is, a reference voltage Vref is applied from a reference voltage generating circuit to the A/D converter through the voltage follower type operational amplifier. The voltage follower type operational amplifier is used to reduce output impedance. The power supply voltage Vdd can be detected by a converted value (a digital value) from the A/D converter since the reference voltage Vref is independent of the power supply voltage Vdd and the converted value varies depending on the power supply voltage Vdd.

Abstract: A low-voltage detection reset circuit that suppresses a current consumption in a stand-by mode and is reduced in a size is offered. The low-voltage detection reset circuit is provided with a power-on reset circuit that operates only at power-on and outputs a reset pulse and is configured to set a detection level of a detection level setting circuit at a default value using the reset pulse and to activate a programmable low-voltage detection circuit. After the programmable low-voltage detection circuit is activated, a detection level of the programmable low-voltage detection circuit can be modified from the default value by a register.

Abstract: A circuit for prevention of unintentional writing to a memory prevents unintentional writing to a nonvolatile memory, after a recovery from a transitory power failure. The circuit includes a low-voltage detection circuit for detecting a power supply voltage drop depending on the state of a control signal for the detection circuit. A writing operation to the memory is prohibited depending on the control signal as well as upon an output signal of the low-voltage detection circuit.

Abstract: Disclosed are a semiconductor storage apparatus and a microcomputer incorporating the same. The semiconductor storage apparatus has a nonvolatile memory and a first sense amplifier comparing the level of a read-out signal read out from the nonvolatile memory with a first reference level. The semiconductor storage apparatus comprises a detector operable to output, when detecting that a difference between the level of the read-out signal and the first reference level is smaller than a predetermined level difference, a detection signal indicative of the difference being smaller than the predetermined level difference.

Abstract: Disclosed are a semiconductor storage apparatus and a microcomputer incorporating the same. The semiconductor storage apparatus has a nonvolatile memory and a first sense amplifier comparing the level of a read-out signal read out from the nonvolatile memory with a first reference level. The semiconductor storage apparatus comprises a detector operable to output, when detecting that a difference between the level of the read-out signal and the first reference level is smaller than a predetermined level difference, a detection signal indicative of the difference being smaller than the predetermined level difference.

Abstract: A circuit for prevention of unintentional writing to a memory prevents unintentional writing to a nonvolatile memory, after a recovery from a transitory power failure. The circuit includes a low-voltage detection circuit for detecting a power supply voltage drop depending on the state of a control signal for the detection circuit. A writing operation to the memory is prohibited depending on the control signal as well as upon an output signal of the low-voltage detection circuit.

Abstract: A selection circuit causes either a memory 6H or 6L to enter an enabled state according to address data A16 of address data A0-A16 when a mode signal M is 1. The selection circuit comprises OR gates (10, 12) which output different outputs. When the address data A16 is 0, a nonvolatile memory 6L enters an enabled state. Then, the memory 6L is addressed according to the address data A0-A15 so that, for example, 8-bit lower data is written therein. On the other hand, when the address data A16 is 1, a nonvolatile memory 6H becomes in an enabled state. Then, the memory 6H is addressed according to the address data A0-A15 so that, for example, 8-bit upper data is written therein. Also, when an external terminal (17) is grounded, and a mode signal become 0, the OR gates (10, 12) outputs signals 0, so that the memories 6H, 6L simultaneously become in an enabled state. When data is read from corresponding addresses of each memory, data of, for example, 16-bits is obtained.

Abstract: A memory mat including EEPROM memory has a redundancy memory area for replacing a defective memory area occurring in a main memory area. The most feature of the invention is that a redundancy address memory area for storing address data of the defective memory area is provided in a part of an inforow memory area within the memory mat. The inforow memory area is constructed accessibly only at the time of a test mode.

Abstract: A read protection memory area is formed within the same memory mat as a main memory area, so that the need to dedicatedly provide a dedicated EEPROM cell for storing read protection data and an analog control circuit for writing the read protection data into this EEPROM cell is eliminated and a chip size can be reduced.

Abstract: A read protection memory area is formed within the same memory mat as a main memory area, so that the need to dedicatedly provide a dedicated EEPROM cell for storing read protection data and an analog control circuit for writing the read protection data into this EEPROM cell is eliminated and a chip size can be reduced.

Abstract: A memory mat including EEPROM memory has a redundancy memory area for replacing a defective memory area occurring in a main memory area. The most feature of the invention is that a redundancy address memory area for storing address data of the defective memory area is provided in a part of an inforow memory area within the memory mat. The inforow memory area is constructed accessibly only at the time of a test mode.

Abstract: When writing of data into nonvolatile memories 8H and 8L is started, data D7 and D15 corresponding to the 128th word of a data input section 8B are inverted and outputted. When accurate writing is subsequently performed, the data D7 and D15 are outputted as they are. By monitoring a change of the data D7 and D15 from the nonvolatile memories 8H and 8L, it is possible to detect whether writing is still continuing or has already completed. Thus, by using nonvolatile memories of 8 bit data width or the like, a 16-bit microcomputer can be easily realized.